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author | Ahmed Irfan <irfan@levert.(none)> | 2015-04-03 16:38:07 +0200 |
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committer | Ahmed Irfan <irfan@levert.(none)> | 2015-04-03 16:38:07 +0200 |
commit | bdf6b2b19ab2206f5957ad5b2ec582c2730d45ee (patch) | |
tree | 1d02541701054a1c3b1cdb66478d0cbc31c2d38f /techlibs/xilinx/example_mojo_counter | |
parent | 8acdd90bc918b780ad45cdac42b3baf84d2cc476 (diff) | |
parent | 4b4490761949e738dee54bdfc52e080e0a5c9067 (diff) | |
download | yosys-bdf6b2b19ab2206f5957ad5b2ec582c2730d45ee.tar.gz yosys-bdf6b2b19ab2206f5957ad5b2ec582c2730d45ee.tar.bz2 yosys-bdf6b2b19ab2206f5957ad5b2ec582c2730d45ee.zip |
Merge branch 'master' of https://github.com/cliffordwolf/yosys
Diffstat (limited to 'techlibs/xilinx/example_mojo_counter')
-rw-r--r-- | techlibs/xilinx/example_mojo_counter/README | 10 | ||||
-rw-r--r-- | techlibs/xilinx/example_mojo_counter/example.sh | 18 | ||||
-rw-r--r-- | techlibs/xilinx/example_mojo_counter/example.ucf | 14 | ||||
-rw-r--r-- | techlibs/xilinx/example_mojo_counter/example.v | 14 |
4 files changed, 0 insertions, 56 deletions
diff --git a/techlibs/xilinx/example_mojo_counter/README b/techlibs/xilinx/example_mojo_counter/README deleted file mode 100644 index 690a9d843..000000000 --- a/techlibs/xilinx/example_mojo_counter/README +++ /dev/null @@ -1,10 +0,0 @@ - -This is a simple example for Yosys synthesis targeting the Mojo FPGA -development board [1, 2]. Simple script for xst-based synthesis (incl. -generation of reference edif files) and uploading to the board can be -found here [3]. - -[1] http://embeddedmicro.com/tutorials/mojo -[2] https://www.sparkfun.com/products/11953 -[3] http://svn.clifford.at/handicraft/2013/mojo/ - diff --git a/techlibs/xilinx/example_mojo_counter/example.sh b/techlibs/xilinx/example_mojo_counter/example.sh deleted file mode 100644 index 74a0c117f..000000000 --- a/techlibs/xilinx/example_mojo_counter/example.sh +++ /dev/null @@ -1,18 +0,0 @@ -#!/bin/bash - -set -ex - -XILINX_DIR=/opt/Xilinx/14.5/ISE_DS/ISE -XILINX_PART=xc6slx9-2-tqg144 - -../../../yosys - <<- EOT - read_verilog example.v - synth_xilinx -edif synth.edif -EOT - -$XILINX_DIR/bin/lin64/edif2ngd -a synth.edif synth.ngo -$XILINX_DIR/bin/lin64/ngdbuild -p $XILINX_PART -uc example.ucf synth.ngo synth.ngd -$XILINX_DIR/bin/lin64/map -p $XILINX_PART -w -o mapped.ncd synth.ngd constraints.pcf -$XILINX_DIR/bin/lin64/par -w mapped.ncd placed.ncd constraints.pcf -$XILINX_DIR/bin/lin64/bitgen -w placed.ncd example.bit constraints.pcf - diff --git a/techlibs/xilinx/example_mojo_counter/example.ucf b/techlibs/xilinx/example_mojo_counter/example.ucf deleted file mode 100644 index 93d97b4dc..000000000 --- a/techlibs/xilinx/example_mojo_counter/example.ucf +++ /dev/null @@ -1,14 +0,0 @@ -NET "clk" TNM_NET = clk; -TIMESPEC TS_clk = PERIOD "clk" 50 MHz HIGH 50%; - -NET "clk" LOC = P56; -NET "ctrl" LOC = P1; - -NET "led_0" LOC = P134; -NET "led_1" LOC = P133; -NET "led_2" LOC = P132; -NET "led_3" LOC = P131; -NET "led_4" LOC = P127; -NET "led_5" LOC = P126; -NET "led_6" LOC = P124; -NET "led_7" LOC = P123; diff --git a/techlibs/xilinx/example_mojo_counter/example.v b/techlibs/xilinx/example_mojo_counter/example.v deleted file mode 100644 index cb98cc1b2..000000000 --- a/techlibs/xilinx/example_mojo_counter/example.v +++ /dev/null @@ -1,14 +0,0 @@ -module top(clk, ctrl, led_7, led_6, led_5, led_4, led_3, led_2, led_1, led_0); - -input clk, ctrl; -output led_7, led_6, led_5, led_4; -output led_3, led_2, led_1, led_0; - -reg [31:0] counter; - -always @(posedge clk) - counter <= counter + (ctrl ? 4 : 1); - -assign {led_7, led_6, led_5, led_4, led_3, led_2, led_1, led_0} = counter >> 24; - -endmodule |