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| author | Eddie Hung <eddie@fpgeh.com> | 2019-07-10 17:06:05 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-07-10 17:06:05 -0700 |
| commit | 7b2599cb94a718d3c3d6fa4b5eb3ad4824ed13c4 (patch) | |
| tree | 838b213f355016a83a8c55945f484022238d42b1 /techlibs/xilinx/ff_map.v | |
| parent | 0ab8f28bc7b6fefc1b4acd4e5c1cb437af878806 (diff) | |
| download | yosys-7b2599cb94a718d3c3d6fa4b5eb3ad4824ed13c4.tar.gz yosys-7b2599cb94a718d3c3d6fa4b5eb3ad4824ed13c4.tar.bz2 yosys-7b2599cb94a718d3c3d6fa4b5eb3ad4824ed13c4.zip | |
Move ABC FF stuff to abc_ff.v; add support for other FD* types
Diffstat (limited to 'techlibs/xilinx/ff_map.v')
| -rw-r--r-- | techlibs/xilinx/ff_map.v | 21 |
1 files changed, 2 insertions, 19 deletions
diff --git a/techlibs/xilinx/ff_map.v b/techlibs/xilinx/ff_map.v index 5ad73aa63..b12b0ed7d 100644 --- a/techlibs/xilinx/ff_map.v +++ b/techlibs/xilinx/ff_map.v @@ -23,26 +23,9 @@ `ifndef _NO_FFS module \$_DFF_N_ (input D, C, output Q); FDRE_1 #(.INIT(|0)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .CE(1'b1), .R(1'b0)); endmodule -module \$_DFF_P_ (input D, C, output Q); -`ifndef _ABC - FDRE #(.INIT(|0)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .CE(1'b1), .R(1'b0)); -`else - wire \$nextQ ; - \$__ABC_FDRE #(.INIT(|0)) _TECHMAP_REPLACE_ (.D(D), .Q(\$nextQ ), .\$pastQ (Q), .C(C), .CE(1'b1), .R(1'b0)); - \$__ABC_FF_ abc_dff (.D(\$nextQ ), .Q(Q)); -`endif -endmodule - +module \$_DFF_P_ (input D, C, output Q); FDRE #(.INIT(|0)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .CE(1'b1), .R(1'b0)); endmodule module \$_DFFE_NP_ (input D, C, E, output Q); FDRE_1 #(.INIT(|0)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .CE(E), .R(1'b0)); endmodule -module \$_DFFE_PP_ (input D, C, E, output Q); -`ifndef _ABC - FDRE #(.INIT(|0)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .CE(E), .R(1'b0)); -`else - wire \$nextQ ; - \$__ABC_FDRE #(.INIT(|0)) _TECHMAP_REPLACE_ (.D(D), .Q(\$nextQ ), .\$pastQ (Q), .C(C), .CE(E), .R(1'b0)); - \$__ABC_FF_ abc_dff (.D(\$nextQ ), .Q(Q)); -`endif -endmodule +module \$_DFFE_PP_ (input D, C, E, output Q); FDRE #(.INIT(|0)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .CE(E), .R(1'b0)); endmodule module \$_DFF_NN0_ (input D, C, R, output Q); FDCE_1 #(.INIT(|0)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .CE(1'b1), .CLR(!R)); endmodule module \$_DFF_NP0_ (input D, C, R, output Q); FDCE_1 #(.INIT(|0)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .CE(1'b1), .CLR( R)); endmodule |