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| author | Eddie Hung <eddie@fpgeh.com> | 2019-04-09 10:06:44 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-04-12 12:28:37 -0700 |
| commit | 04e466d5e4ca4654495cb1044f6f200d817f63a2 (patch) | |
| tree | dc9868fc1715edf46d27b6f00620d905d41d4eeb /techlibs/xilinx/synth_xilinx.cc | |
| parent | 1c6f0cffd95876eac620bdfe9be50b366dabd8c6 (diff) | |
| download | yosys-04e466d5e4ca4654495cb1044f6f200d817f63a2.tar.gz yosys-04e466d5e4ca4654495cb1044f6f200d817f63a2.tar.bz2 yosys-04e466d5e4ca4654495cb1044f6f200d817f63a2.zip | |
Add support for synth_xilinx -abc9 and ignore abc9 -dress opt
Diffstat (limited to 'techlibs/xilinx/synth_xilinx.cc')
| -rw-r--r-- | techlibs/xilinx/synth_xilinx.cc | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc index 805ae8e6e..090bcce85 100644 --- a/techlibs/xilinx/synth_xilinx.cc +++ b/techlibs/xilinx/synth_xilinx.cc @@ -80,6 +80,9 @@ struct SynthXilinxPass : public Pass log(" -retime\n"); log(" run 'abc' with -dff option\n"); log("\n"); + log(" -abc9\n"); + log(" use abc9 instead of abc\n"); + log("\n"); log("\n"); log("The following commands are executed by this synthesis command:\n"); log("\n"); @@ -142,6 +145,7 @@ struct SynthXilinxPass : public Pass std::string edif_file; std::string blif_file; std::string run_from, run_to; + std::string abc = "abc"; bool flatten = false; bool retime = false; bool vpr = false; @@ -191,6 +195,10 @@ struct SynthXilinxPass : public Pass nodram = true; continue; } + if (args[argidx] == "-abc9") { + abc = "abc9"; + continue; + } break; } extra_args(args, argidx, design); @@ -267,7 +275,7 @@ struct SynthXilinxPass : public Pass if (check_label(active, run_from, run_to, "map_luts")) { - Pass::call(design, "abc -luts 2:2,3,6:5,10,20" + string(retime ? " -dff" : "")); + Pass::call(design, abc + " -luts 2:2,3,6:5,10,20" + string(retime ? " -dff" : "")); Pass::call(design, "clean"); Pass::call(design, "techmap -map +/xilinx/lut_map.v"); } |