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| author | Eddie Hung <eddie@fpgeh.com> | 2020-01-02 12:48:07 -0800 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2020-01-02 12:48:07 -0800 |
| commit | 3012e9eebc2950b996d17a018bb2e0535badef22 (patch) | |
| tree | da51d33c76e4489af3e903ba92d20c3edd29e217 /techlibs/xilinx/synth_xilinx.cc | |
| parent | d0d3ab8f676cd355d74cb7b7f71fc5bfca0719a2 (diff) | |
| parent | ef6548203cca239a98b00ea652a92fe3e20f97d7 (diff) | |
| download | yosys-3012e9eebc2950b996d17a018bb2e0535badef22.tar.gz yosys-3012e9eebc2950b996d17a018bb2e0535badef22.tar.bz2 yosys-3012e9eebc2950b996d17a018bb2e0535badef22.zip | |
Merge remote-tracking branch 'origin/master' into eddie/abc9_dsp_refactor
Diffstat (limited to 'techlibs/xilinx/synth_xilinx.cc')
| -rw-r--r-- | techlibs/xilinx/synth_xilinx.cc | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc index d4095e449..b0c4795ee 100644 --- a/techlibs/xilinx/synth_xilinx.cc +++ b/techlibs/xilinx/synth_xilinx.cc @@ -108,7 +108,7 @@ struct SynthXilinxPass : public ScriptPass log(" flatten design before synthesis\n"); log("\n"); log(" -retime\n"); - log(" run 'abc' with -dff option\n"); + log(" run 'abc' with '-dff -D 1' options\n"); log("\n"); log(" -abc9\n"); log(" use new ABC9 flow (EXPERIMENTAL)\n"); @@ -550,9 +550,9 @@ struct SynthXilinxPass : public ScriptPass } else { if (nowidelut) - run("abc -luts 2:2,3,6:5" + string(retime ? " -dff" : "")); + run("abc -luts 2:2,3,6:5" + string(retime ? " -dff -D 1" : "")); else - run("abc -luts 2:2,3,6:5,10,20" + string(retime ? " -dff" : "")); + run("abc -luts 2:2,3,6:5,10,20" + string(retime ? " -dff -D 1" : "")); } run("clean"); |