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| author | Claire Wolf <clifford@clifford.at> | 2020-02-27 19:03:59 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-02-27 19:03:59 +0100 |
| commit | 47228feb7741aeead951891063670dc46af36dc7 (patch) | |
| tree | 77ffd53ddb77655a0637cf1b25da97520d2937c3 /techlibs/xilinx/synth_xilinx.cc | |
| parent | 62ab100c611071a41de5ff1ab0bd482b9c7bcc82 (diff) | |
| parent | 6a0682f5a0148949beacad0eb93ec5b754bf29cd (diff) | |
| download | yosys-47228feb7741aeead951891063670dc46af36dc7.tar.gz yosys-47228feb7741aeead951891063670dc46af36dc7.tar.bz2 yosys-47228feb7741aeead951891063670dc46af36dc7.zip | |
Merge pull request #1708 from rqou/coolrunner2-buf-fix
coolrunner2: Separate and improve buffer cell insertion pass
Diffstat (limited to 'techlibs/xilinx/synth_xilinx.cc')
0 files changed, 0 insertions, 0 deletions