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| author | Eddie Hung <eddieh@ece.ubc.ca> | 2019-03-19 15:05:08 -0700 |
|---|---|---|
| committer | Eddie Hung <eddieh@ece.ubc.ca> | 2019-03-19 15:05:08 -0700 |
| commit | 4cd8f0297381c5fb9fe3b8cbb22d4240f2aaae63 (patch) | |
| tree | 17daef0a82a7f9bd6ff9bfde841ba3cf2dadec4c /techlibs/xilinx/synth_xilinx.cc | |
| parent | f239cb821edb86c3ec48782139e982819f073a7c (diff) | |
| download | yosys-4cd8f0297381c5fb9fe3b8cbb22d4240f2aaae63.tar.gz yosys-4cd8f0297381c5fb9fe3b8cbb22d4240f2aaae63.tar.bz2 yosys-4cd8f0297381c5fb9fe3b8cbb22d4240f2aaae63.zip | |
shregmap -tech xilinx to delete $shiftx for var length SRL
Diffstat (limited to 'techlibs/xilinx/synth_xilinx.cc')
0 files changed, 0 insertions, 0 deletions