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| author | Pepijn de Vos <pepijndevos@gmail.com> | 2019-09-06 10:55:04 +0200 |
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| committer | Pepijn de Vos <pepijndevos@gmail.com> | 2019-09-06 10:55:04 +0200 |
| commit | 96efa63f16ae30927759b374c86a68753199d0d2 (patch) | |
| tree | 52993ea65397575ecc4ca8bf5bb28423d9acd7b9 /techlibs/xilinx/synth_xilinx.cc | |
| parent | 1b9f7f49b5e90f51f8c3c2d2e8afbaa074137413 (diff) | |
| download | yosys-96efa63f16ae30927759b374c86a68753199d0d2.tar.gz yosys-96efa63f16ae30927759b374c86a68753199d0d2.tar.bz2 yosys-96efa63f16ae30927759b374c86a68753199d0d2.zip | |
fix BRAM width and init
Diffstat (limited to 'techlibs/xilinx/synth_xilinx.cc')
0 files changed, 0 insertions, 0 deletions