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author | Eddie Hung <eddie@fpgeh.com> | 2019-12-20 13:07:24 -0800 |
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committer | Eddie Hung <eddie@fpgeh.com> | 2019-12-20 13:07:24 -0800 |
commit | a75e08c7094d7d6f623057ad936c63551f1ebfbe (patch) | |
tree | 1b2086a8d179154e4e820d49068772bf852e6a0d /techlibs/xilinx/synth_xilinx.cc | |
parent | e58c3f8351763facc12f61c42797cc2a5edf0907 (diff) | |
download | yosys-a75e08c7094d7d6f623057ad936c63551f1ebfbe.tar.gz yosys-a75e08c7094d7d6f623057ad936c63551f1ebfbe.tar.bz2 yosys-a75e08c7094d7d6f623057ad936c63551f1ebfbe.zip |
write_xaiger: only instantiate each whitebox cell type once
Diffstat (limited to 'techlibs/xilinx/synth_xilinx.cc')
0 files changed, 0 insertions, 0 deletions