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| author | Eddie Hung <eddie@fpgeh.com> | 2019-04-28 12:36:04 -0700 |
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| committer | Eddie Hung <eddie@fpgeh.com> | 2019-04-28 12:36:04 -0700 |
| commit | af840bbc63a9a82a9c4e2c24476c70659efee63f (patch) | |
| tree | b8e4c21f5551e9a2d01af67437b9286facf97059 /techlibs/xilinx/synth_xilinx.cc | |
| parent | d855683917b42555c1e3472e71c957335574655c (diff) | |
| download | yosys-af840bbc63a9a82a9c4e2c24476c70659efee63f.tar.gz yosys-af840bbc63a9a82a9c4e2c24476c70659efee63f.tar.bz2 yosys-af840bbc63a9a82a9c4e2c24476c70659efee63f.zip | |
Move neg-pol to pos-pol mapping from ff_map to cells_map.v
Diffstat (limited to 'techlibs/xilinx/synth_xilinx.cc')
0 files changed, 0 insertions, 0 deletions