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| author | Eddie Hung <eddieh@ece.ubc.ca> | 2019-03-23 16:09:38 -0700 |
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| committer | Eddie Hung <eddieh@ece.ubc.ca> | 2019-03-23 16:09:38 -0700 |
| commit | bf83c074c82756b1cd23a9c3998b6c4d535dae29 (patch) | |
| tree | bdbcb2c398a3a1679d1201c7cf4ac63c2e9089ad /techlibs/xilinx/synth_xilinx.cc | |
| parent | 098bd5758fe2e4cb7efa44503a1c498b0a2ace5e (diff) | |
| download | yosys-bf83c074c82756b1cd23a9c3998b6c4d535dae29.tar.gz yosys-bf83c074c82756b1cd23a9c3998b6c4d535dae29.tar.bz2 yosys-bf83c074c82756b1cd23a9c3998b6c4d535dae29.zip | |
Cope with SHREG not having E port; Revert $pmux fine tune
Diffstat (limited to 'techlibs/xilinx/synth_xilinx.cc')
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