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| author | Eddie Hung <eddie@fpgeh.com> | 2019-10-04 11:04:10 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-10-04 11:04:10 -0700 |
| commit | aae2b9fd9c8dc915fadacc24962436dd7aedff36 (patch) | |
| tree | 38ec98224113556a8a5a6d93d5bc2c0cb506286e /techlibs/xilinx/xc6s_brams_bb.v | |
| parent | 9fef1df3c1431cff2e097a10a502f77f04986a60 (diff) | |
| download | yosys-aae2b9fd9c8dc915fadacc24962436dd7aedff36.tar.gz yosys-aae2b9fd9c8dc915fadacc24962436dd7aedff36.tar.bz2 yosys-aae2b9fd9c8dc915fadacc24962436dd7aedff36.zip | |
Rename abc_* names/attributes to more precisely be abc9_*
Diffstat (limited to 'techlibs/xilinx/xc6s_brams_bb.v')
| -rw-r--r-- | techlibs/xilinx/xc6s_brams_bb.v | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/techlibs/xilinx/xc6s_brams_bb.v b/techlibs/xilinx/xc6s_brams_bb.v index 041d6b54f..3c323a90b 100644 --- a/techlibs/xilinx/xc6s_brams_bb.v +++ b/techlibs/xilinx/xc6s_brams_bb.v @@ -19,9 +19,13 @@ module RAMB8BWER ( input [1:0] WEAWEL, input [1:0] WEBWEU, + /* (* abc9_arrival=<TODO> *) */ output [15:0] DOADO, + /* (* abc9_arrival=<TODO> *) */ output [15:0] DOBDO, + /* (* abc9_arrival=<TODO> *) */ output [1:0] DOPADOP, + /* (* abc9_arrival=<TODO> *) */ output [1:0] DOPBDOP ); parameter INITP_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000; @@ -109,9 +113,13 @@ module RAMB16BWER ( input [3:0] WEA, input [3:0] WEB, + /* (* abc9_arrival=<TODO> *) */ output [31:0] DOA, + /* (* abc9_arrival=<TODO> *) */ output [31:0] DOB, + /* (* abc9_arrival=<TODO> *) */ output [3:0] DOPA, + /* (* abc9_arrival=<TODO> *) */ output [3:0] DOPB ); parameter INITP_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000; |