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| author | Eddie Hung <eddie@fpgeh.com> | 2019-08-28 15:19:10 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-08-28 15:19:10 -0700 |
| commit | 8d820a9884c0a58ee7817a2052d8b915578a7ba7 (patch) | |
| tree | 7868bc0063dd0d36aa84a48c8ede1a3f3a8c37c3 /techlibs/xilinx/xc7_brams_bb.v | |
| parent | 3fa826254fb337e39334c8d94df6bcc142d17934 (diff) | |
| parent | fc727fa5c9e0a04a5dc1b4fcef652c5bca90b220 (diff) | |
| download | yosys-8d820a9884c0a58ee7817a2052d8b915578a7ba7.tar.gz yosys-8d820a9884c0a58ee7817a2052d8b915578a7ba7.tar.bz2 yosys-8d820a9884c0a58ee7817a2052d8b915578a7ba7.zip | |
Merge remote-tracking branch 'origin/master' into xaig_arrival
Diffstat (limited to 'techlibs/xilinx/xc7_brams_bb.v')
| -rw-r--r-- | techlibs/xilinx/xc7_brams_bb.v | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/techlibs/xilinx/xc7_brams_bb.v b/techlibs/xilinx/xc7_brams_bb.v index 56939089c..5b40a457d 100644 --- a/techlibs/xilinx/xc7_brams_bb.v +++ b/techlibs/xilinx/xc7_brams_bb.v @@ -1,7 +1,9 @@ // Max delays from https://github.com/SymbiFlow/prjxray-db/blob/f8e0364116b2983ac72a3dc8c509ea1cc79e2e3d/artix7/timings/BRAM_L.sdf#L138-L147 module RAMB18E1 ( + (* clkbuf_sink *) input CLKARDCLK, + (* clkbuf_sink *) input CLKBWRCLK, input ENARDEN, input ENBWREN, @@ -129,7 +131,9 @@ module RAMB18E1 ( endmodule module RAMB36E1 ( + (* clkbuf_sink *) input CLKARDCLK, + (* clkbuf_sink *) input CLKBWRCLK, input ENARDEN, input ENBWREN, |