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author | David Shah <dave@ds0.me> | 2019-10-18 14:02:57 +0100 |
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committer | David Shah <dave@ds0.me> | 2019-10-23 11:47:44 +0100 |
commit | 3506eaf2904cddf5132c598a527e050a79a181d5 (patch) | |
tree | c5909467e7a42fa6b69b0e49d440a787bc36e3c5 /techlibs/xilinx/xcu_brams_bb.v | |
parent | 6769d31ddbab341940af9b42b538fca60797fdf4 (diff) | |
download | yosys-3506eaf2904cddf5132c598a527e050a79a181d5.tar.gz yosys-3506eaf2904cddf5132c598a527e050a79a181d5.tar.bz2 yosys-3506eaf2904cddf5132c598a527e050a79a181d5.zip |
xilinx: Add URAM288 mapping for xcup
Signed-off-by: David Shah <dave@ds0.me>
Diffstat (limited to 'techlibs/xilinx/xcu_brams_bb.v')
-rw-r--r-- | techlibs/xilinx/xcu_brams_bb.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/techlibs/xilinx/xcu_brams_bb.v b/techlibs/xilinx/xcu_brams_bb.v index f3e43d0d6..cc70ce371 100644 --- a/techlibs/xilinx/xcu_brams_bb.v +++ b/techlibs/xilinx/xcu_brams_bb.v @@ -402,4 +402,4 @@ module RAMB36E2 (...); input SLEEP; input [3:0] WEA; input [7:0] WEBWE; -endmodule
\ No newline at end of file +endmodule |