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| author | Eddie Hung <eddie@fpgeh.com> | 2019-04-18 07:59:16 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-04-18 07:59:16 -0700 |
| commit | 6008bb7002f874e5c748eaa2050e7b6c17b32745 (patch) | |
| tree | 144826f52008c12014157b186b3aa0f057c8d79b /techlibs/xilinx | |
| parent | 0642baabbceaf4e34ae03c47136ed987b976cdbb (diff) | |
| download | yosys-6008bb7002f874e5c748eaa2050e7b6c17b32745.tar.gz yosys-6008bb7002f874e5c748eaa2050e7b6c17b32745.tar.bz2 yosys-6008bb7002f874e5c748eaa2050e7b6c17b32745.zip | |
Revert "synth_* with -retime option now calls abc with -D 1 as well"
This reverts commit 9a6da9a79a22e984ee3eec02caa230b66f10e11a.
Diffstat (limited to 'techlibs/xilinx')
| -rw-r--r-- | techlibs/xilinx/synth_xilinx.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc index a462b9052..397c83ac6 100644 --- a/techlibs/xilinx/synth_xilinx.cc +++ b/techlibs/xilinx/synth_xilinx.cc @@ -115,7 +115,7 @@ struct SynthXilinxPass : public Pass log("\n"); log(" map_luts:\n"); log(" techmap -map +/techmap.v -map +/xilinx/ff_map.v t:$_DFF_?N?\n"); - log(" abc -luts 2:2,3,6:5,10,20 [-dff -D 1]\n"); + log(" abc -luts 2:2,3,6:5,10,20 [-dff]\n"); log(" clean\n"); log(" techmap -map +/xilinx/lut_map.v -map +/xilinx/ff_map.v"); log("\n"); @@ -269,7 +269,7 @@ struct SynthXilinxPass : public Pass if (check_label(active, run_from, run_to, "map_luts")) { Pass::call(design, "techmap -map +/techmap.v -map +/xilinx/ff_map.v t:$_DFF_?N?"); - Pass::call(design, "abc -luts 2:2,3,6:5,10,20" + string(retime ? " -dff -D 1" : "")); + Pass::call(design, "abc -luts 2:2,3,6:5,10,20" + string(retime ? " -dff" : "")); Pass::call(design, "clean"); Pass::call(design, "techmap -map +/xilinx/lut_map.v -map +/xilinx/ff_map.v"); } |