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| author | Eddie Hung <eddie@fpgeh.com> | 2019-12-27 14:52:26 -0800 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-12-27 14:52:26 -0800 |
| commit | b7afafde22c195f381168677407a2abc93c5fae0 (patch) | |
| tree | c6d84274a6d02b2184fadbc2b6e7cb8ff8fc109d /techlibs/xilinx | |
| parent | 5017be6445fdf3729eb8781e1692be1099039a90 (diff) | |
| download | yosys-b7afafde22c195f381168677407a2abc93c5fae0.tar.gz yosys-b7afafde22c195f381168677407a2abc93c5fae0.tar.bz2 yosys-b7afafde22c195f381168677407a2abc93c5fae0.zip | |
Consistency
Diffstat (limited to 'techlibs/xilinx')
| -rw-r--r-- | techlibs/xilinx/abc9_xc7.box | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/techlibs/xilinx/abc9_xc7.box b/techlibs/xilinx/abc9_xc7.box index 774388d49..c6df54667 100644 --- a/techlibs/xilinx/abc9_xc7.box +++ b/techlibs/xilinx/abc9_xc7.box @@ -21,7 +21,7 @@ MUXF8 2 1 3 1 # and expect to save on its delay # Inputs: I0 I1 I2 I3 S0 S1 # Outputs: O -$__MUXF78 3 1 6 1 +$__XILINX_MUXF78 3 1 6 1 294 297 311 317 390 273 # CARRY4 + CARRY4_[ABCD]X |