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| author | Eddie Hung <eddie@fpgeh.com> | 2019-04-09 14:32:10 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-04-09 14:32:10 -0700 |
| commit | b9e19071b8596b8d06b99cbb653325c0c9dc330f (patch) | |
| tree | 4be4df07491cf9ae6abec2983c53ba93ac00c54a /techlibs/xilinx | |
| parent | d536379c62d926967d5e7743b32990167f91e762 (diff) | |
| download | yosys-b9e19071b8596b8d06b99cbb653325c0c9dc330f.tar.gz yosys-b9e19071b8596b8d06b99cbb653325c0c9dc330f.tar.bz2 yosys-b9e19071b8596b8d06b99cbb653325c0c9dc330f.zip | |
Add delays to cells.box
Diffstat (limited to 'techlibs/xilinx')
| -rw-r--r-- | techlibs/xilinx/cells.box | 16 |
1 files changed, 12 insertions, 4 deletions
diff --git a/techlibs/xilinx/cells.box b/techlibs/xilinx/cells.box index 31ad4a656..c8092db6e 100644 --- a/techlibs/xilinx/cells.box +++ b/techlibs/xilinx/cells.box @@ -1,5 +1,13 @@ -MUXF7 1 0 2 1 -1 1 +# Max delays from https://pastebin.com/v2hrcksd +# from https://github.com/SymbiFlow/prjxray/pull/706#issuecomment-479380321 -MUXF8 2 0 2 1 -1 1 +# F7BMUX slower than F7AMUX +# Inputs: 0 1 S0 +# Outputs: OUT +F7BMUX 1 0 3 1 +217 223 296 + +# Inputs: 0 1 S0 +# Outputs: OUT +MUXF8 2 0 3 1 +104 94 273 |