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| author | Eddie Hung <eddie@fpgeh.com> | 2019-05-24 20:39:55 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-05-24 20:39:55 -0700 |
| commit | ca5774ed40db8dafe3696deb9fe9827d7196d7bf (patch) | |
| tree | c40f6a51addd0f4c4c7febb3b0df2df93061db36 /techlibs/xilinx | |
| parent | 6ad09bfcea4711eaff609a4e804e29fa888d4b14 (diff) | |
| download | yosys-ca5774ed40db8dafe3696deb9fe9827d7196d7bf.tar.gz yosys-ca5774ed40db8dafe3696deb9fe9827d7196d7bf.tar.bz2 yosys-ca5774ed40db8dafe3696deb9fe9827d7196d7bf.zip | |
Try new LUT delays
Diffstat (limited to 'techlibs/xilinx')
| -rw-r--r-- | techlibs/xilinx/abc.lut | 19 |
1 files changed, 11 insertions, 8 deletions
diff --git a/techlibs/xilinx/abc.lut b/techlibs/xilinx/abc.lut index c53cd50a1..438ed0368 100644 --- a/techlibs/xilinx/abc.lut +++ b/techlibs/xilinx/abc.lut @@ -1,11 +1,14 @@ # Max delays from https://github.com/SymbiFlow/prjxray-db/blob/34ea6eb08a63d21ec16264ad37a0a7b142ff6031/artix7/timings/CLBLL_L.sdf # K area delay -1 1 624 -2 2 624 -3 3 624 -4 3 624 -5 3 624 -6 5 724 -7 10 1020 -8 20 1293 +1 1 248 +2 2 248 372 +3 3 248 372 496 +4 3 248 372 496 620 +5 3 248 372 496 620 744 +6 5 124 248 372 496 620 744 + # F7BMUX +7 10 296 420 544 668 792 916 1040 + # F8MUX + # F8MUX+F7BMUX +8 20 273 569 693 817 941 1065 1189 1313 |