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author | Gabriel L. Somlo <gsomlo@gmail.com> | 2019-06-27 22:54:09 -0400 |
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committer | Gabriel L. Somlo <gsomlo@gmail.com> | 2019-06-27 23:00:13 -0400 |
commit | 6f1c1379891651b0d110e35fb2c73fd78fde3f69 (patch) | |
tree | ca74714f5a19cf58b5ce66a6fc753d14b0b84efb /tests/aiger/run-test.sh | |
parent | c4c39e98146b6837c35c425ef7987b2be45c0451 (diff) | |
download | yosys-6f1c1379891651b0d110e35fb2c73fd78fde3f69.tar.gz yosys-6f1c1379891651b0d110e35fb2c73fd78fde3f69.tar.bz2 yosys-6f1c1379891651b0d110e35fb2c73fd78fde3f69.zip |
tests: use optional ABCEXTERNAL when specified
Commits 65924fd1, abc40924, and ebe29b66 hard-code the invocation
of yosys-abc, which fails if ABCEXTERNAL was specified during the
build. Allow tests to utilize an optional, externally specified
abc binary.
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
Diffstat (limited to 'tests/aiger/run-test.sh')
-rwxr-xr-x | tests/aiger/run-test.sh | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/tests/aiger/run-test.sh b/tests/aiger/run-test.sh index 5246c1b48..deaf48a3d 100755 --- a/tests/aiger/run-test.sh +++ b/tests/aiger/run-test.sh @@ -2,6 +2,16 @@ set -e +OPTIND=1 +abcprog="../../yosys-abc" # default to built-in version of abc +while getopts "A:" opt +do + case "$opt" in + A) abcprog="$OPTARG" ;; + esac +done +shift "$((OPTIND-1))" + # NB: *.aag and *.aig must contain a symbol table naming the primary # inputs and outputs, otherwise ABC and Yosys will name them # arbitrarily (and inconsistently with each other). @@ -11,7 +21,7 @@ for aag in *.aag; do # (which would have been created by the reference aig2aig utility, # available from http://fmv.jku.at/aiger/) echo "Checking $aag." - ../../yosys-abc -q "read -c ${aag%.*}.aig; write ${aag%.*}_ref.v" + $abcprog -q "read -c ${aag%.*}.aig; write ${aag%.*}_ref.v" ../../yosys -qp " read_verilog ${aag%.*}_ref.v prep @@ -28,7 +38,7 @@ done for aig in *.aig; do echo "Checking $aig." - ../../yosys-abc -q "read -c $aig; write ${aig%.*}_ref.v" + $abcprog -q "read -c $aig; write ${aig%.*}_ref.v" ../../yosys -qp " read_verilog ${aig%.*}_ref.v prep |