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author | gatecat <gatecat@ds0.me> | 2021-05-15 14:23:22 +0100 |
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committer | gatecat <gatecat@ds0.me> | 2021-05-15 22:37:06 +0100 |
commit | 5dba138c87762d4b5bb7b9348da372a92fab1cc0 (patch) | |
tree | 764f5d928b3e06b6a4884d5d1b14e4533003d18e /tests/arch/intel_alm/lutram.ys | |
parent | 3421979f00664443c77b0899d34438f979b4c51c (diff) | |
download | yosys-5dba138c87762d4b5bb7b9348da372a92fab1cc0.tar.gz yosys-5dba138c87762d4b5bb7b9348da372a92fab1cc0.tar.bz2 yosys-5dba138c87762d4b5bb7b9348da372a92fab1cc0.zip |
intel_alm: Add IO buffer insertion
Signed-off-by: gatecat <gatecat@ds0.me>
Diffstat (limited to 'tests/arch/intel_alm/lutram.ys')
-rw-r--r-- | tests/arch/intel_alm/lutram.ys | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/tests/arch/intel_alm/lutram.ys b/tests/arch/intel_alm/lutram.ys index 66f8a1536..c21c9103b 100644 --- a/tests/arch/intel_alm/lutram.ys +++ b/tests/arch/intel_alm/lutram.ys @@ -2,7 +2,7 @@ read_verilog ../common/lutram.v hierarchy -top lutram_1w1r proc memory -nomap -equiv_opt -run :prove -map +/intel_alm/common/alm_sim.v -map +/intel_alm/common/dff_sim.v -map +/intel_alm/common/mem_sim.v synth_intel_alm -family cyclonev -nobram +equiv_opt -run :prove -map +/intel_alm/common/alm_sim.v -map +/intel_alm/common/dff_sim.v -map +/intel_alm/common/mem_sim.v synth_intel_alm -family cyclonev -nobram -noiopad memory opt -full @@ -24,7 +24,7 @@ read_verilog ../common/lutram.v hierarchy -top lutram_1w1r proc memory -nomap -equiv_opt -run :prove -map +/intel_alm/common/alm_sim.v -map +/intel_alm/common/dff_sim.v -map +/intel_alm/common/mem_sim.v synth_intel_alm -family cyclonev -nobram +equiv_opt -run :prove -map +/intel_alm/common/alm_sim.v -map +/intel_alm/common/dff_sim.v -map +/intel_alm/common/mem_sim.v synth_intel_alm -family cyclonev -nobram -noiopad memory opt -full |