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| author | Lofty <dan.ravensloft@gmail.com> | 2021-04-12 10:33:40 +0100 |
|---|---|---|
| committer | Marcelina Kościelnicka <mwk@0x04.net> | 2021-04-17 20:54:58 +0200 |
| commit | dce037a62c5bda9a8256d271d39b06be366120e8 (patch) | |
| tree | 67d022cbceb487f5359215d7c9ca51959100f549 /tests/arch/quicklogic/fsm.ys | |
| parent | a58571d0fe8971cb7d3a619a31b2c21be6d75bac (diff) | |
| download | yosys-dce037a62c5bda9a8256d271d39b06be366120e8.tar.gz yosys-dce037a62c5bda9a8256d271d39b06be366120e8.tar.bz2 yosys-dce037a62c5bda9a8256d271d39b06be366120e8.zip | |
quicklogic: ABC9 synthesis
Diffstat (limited to 'tests/arch/quicklogic/fsm.ys')
| -rw-r--r-- | tests/arch/quicklogic/fsm.ys | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/tests/arch/quicklogic/fsm.ys b/tests/arch/quicklogic/fsm.ys index 7ed36b9e4..130dacf42 100644 --- a/tests/arch/quicklogic/fsm.ys +++ b/tests/arch/quicklogic/fsm.ys @@ -11,14 +11,13 @@ sat -verify -prove-asserts -show-public -set-at 1 in_reset 1 -seq 20 -prove-skip design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design) cd fsm # Constrain all select calls below inside the top module -select -assert-count 3 t:LUT2 -select -assert-count 6 t:LUT3 -select -assert-count 7 t:LUT4 -select -assert-count 6 t:dffepc +select -assert-count 1 t:LUT2 +select -assert-count 9 t:LUT3 +select -assert-count 4 t:dffepc select -assert-count 1 t:logic_0 select -assert-count 1 t:logic_1 select -assert-count 3 t:inpad select -assert-count 2 t:outpad select -assert-count 1 t:ckpad -select -assert-none t:LUT2 t:LUT3 t:LUT4 t:dffepc t:logic_0 t:logic_1 t:inpad t:outpad t:ckpad %% t:* %D +select -assert-none t:LUT2 t:LUT3 t:dffepc t:logic_0 t:logic_1 t:inpad t:outpad t:ckpad %% t:* %D |