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| author | Lofty <dan.ravensloft@gmail.com> | 2021-03-17 02:34:30 +0000 |
|---|---|---|
| committer | Marcelina Kościelnicka <mwk@0x04.net> | 2021-03-18 13:28:16 +0100 |
| commit | f4298b057ae0939b83283c8c7431097e71a32b62 (patch) | |
| tree | eedd3de21b55af0c2952fd8e730fb165c89fa8a3 /tests/arch/quicklogic/latches.ys | |
| parent | 8740fdf1d799fd8a3196bac28fe4e418e74f2acc (diff) | |
| download | yosys-f4298b057ae0939b83283c8c7431097e71a32b62.tar.gz yosys-f4298b057ae0939b83283c8c7431097e71a32b62.tar.bz2 yosys-f4298b057ae0939b83283c8c7431097e71a32b62.zip | |
quicklogic: PolarPro 3 support
Co-authored-by: Grzegorz Latosiński <glatosinski@antmicro.com>
Co-authored-by: Maciej Kurc <mkurc@antmicro.com>
Co-authored-by: Tarachand Pagarani <tpagarani@quicklogic.com>
Co-authored-by: Lalit Sharma <lsharma@quicklogic.com>
Co-authored-by: kkumar23 <kkumar@quicklogic.com>
Diffstat (limited to 'tests/arch/quicklogic/latches.ys')
| -rw-r--r-- | tests/arch/quicklogic/latches.ys | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/tests/arch/quicklogic/latches.ys b/tests/arch/quicklogic/latches.ys new file mode 100644 index 000000000..d7652f749 --- /dev/null +++ b/tests/arch/quicklogic/latches.ys @@ -0,0 +1,39 @@ +read_verilog ../common/latches.v +design -save read + +hierarchy -top latchp +proc +# Can't run any sort of equivalence check because latches are blown to LUTs +synth_quicklogic +cd latchp # Constrain all select calls below inside the top module +select -assert-count 1 t:LUT3 +select -assert-count 3 t:inpad +select -assert-count 1 t:outpad + +select -assert-none t:LUT3 t:inpad t:outpad %% t:* %D + + +design -load read +hierarchy -top latchn +proc +# Can't run any sort of equivalence check because latches are blown to LUTs +synth_quicklogic +cd latchn # Constrain all select calls below inside the top module +select -assert-count 1 t:LUT3 +select -assert-count 3 t:inpad +select -assert-count 1 t:outpad + +select -assert-none t:LUT3 t:inpad t:outpad %% t:* %D + + +design -load read +hierarchy -top latchsr +proc +# Can't run any sort of equivalence check because latches are blown to LUTs +synth_quicklogic +cd latchsr # Constrain all select calls below inside the top module +select -assert-count 2 t:LUT3 +select -assert-count 5 t:inpad +select -assert-count 1 t:outpad + +select -assert-none t:LUT3 t:inpad t:outpad %% t:* %D |