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author | Miodrag Milanovic <mmicko@gmail.com> | 2019-10-18 12:19:59 +0200 |
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committer | Miodrag Milanovic <mmicko@gmail.com> | 2019-10-18 12:19:59 +0200 |
commit | 5603595e5c0efd2afc9ba810e6e5992e5d81d44c (patch) | |
tree | dcf99c611410e055a7ea71c970938ed6ee50a3c6 /tests/arch/xilinx/adffs.v | |
parent | ab98f2dccf52a1bba396fe313ea0670603dc45ca (diff) | |
download | yosys-5603595e5c0efd2afc9ba810e6e5992e5d81d44c.tar.gz yosys-5603595e5c0efd2afc9ba810e6e5992e5d81d44c.tar.bz2 yosys-5603595e5c0efd2afc9ba810e6e5992e5d81d44c.zip |
Share common tests
Diffstat (limited to 'tests/arch/xilinx/adffs.v')
-rw-r--r-- | tests/arch/xilinx/adffs.v | 47 |
1 files changed, 0 insertions, 47 deletions
diff --git a/tests/arch/xilinx/adffs.v b/tests/arch/xilinx/adffs.v deleted file mode 100644 index 223b52d21..000000000 --- a/tests/arch/xilinx/adffs.v +++ /dev/null @@ -1,47 +0,0 @@ -module adff - ( input d, clk, clr, output reg q ); - initial begin - q = 0; - end - always @( posedge clk, posedge clr ) - if ( clr ) - q <= 1'b0; - else - q <= d; -endmodule - -module adffn - ( input d, clk, clr, output reg q ); - initial begin - q = 0; - end - always @( posedge clk, negedge clr ) - if ( !clr ) - q <= 1'b0; - else - q <= d; -endmodule - -module dffs - ( input d, clk, pre, clr, output reg q ); - initial begin - q = 0; - end - always @( posedge clk ) - if ( pre ) - q <= 1'b1; - else - q <= d; -endmodule - -module ndffnr - ( input d, clk, pre, clr, output reg q ); - initial begin - q = 0; - end - always @( negedge clk ) - if ( !clr ) - q <= 1'b0; - else - q <= d; -endmodule |