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authorMiodrag Milanovic <mmicko@gmail.com>2019-10-18 12:19:59 +0200
committerMiodrag Milanovic <mmicko@gmail.com>2019-10-18 12:19:59 +0200
commit5603595e5c0efd2afc9ba810e6e5992e5d81d44c (patch)
treedcf99c611410e055a7ea71c970938ed6ee50a3c6 /tests/arch/xilinx/mux.v
parentab98f2dccf52a1bba396fe313ea0670603dc45ca (diff)
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Share common tests
Diffstat (limited to 'tests/arch/xilinx/mux.v')
-rw-r--r--tests/arch/xilinx/mux.v65
1 files changed, 0 insertions, 65 deletions
diff --git a/tests/arch/xilinx/mux.v b/tests/arch/xilinx/mux.v
deleted file mode 100644
index 27bc0bf0b..000000000
--- a/tests/arch/xilinx/mux.v
+++ /dev/null
@@ -1,65 +0,0 @@
-module mux2 (S,A,B,Y);
- input S;
- input A,B;
- output reg Y;
-
- always @(*)
- Y = (S)? B : A;
-endmodule
-
-module mux4 ( S, D, Y );
-
-input[1:0] S;
-input[3:0] D;
-output Y;
-
-reg Y;
-wire[1:0] S;
-wire[3:0] D;
-
-always @*
-begin
- case( S )
- 0 : Y = D[0];
- 1 : Y = D[1];
- 2 : Y = D[2];
- 3 : Y = D[3];
- endcase
-end
-
-endmodule
-
-module mux8 ( S, D, Y );
-
-input[2:0] S;
-input[7:0] D;
-output Y;
-
-reg Y;
-wire[2:0] S;
-wire[7:0] D;
-
-always @*
-begin
- case( S )
- 0 : Y = D[0];
- 1 : Y = D[1];
- 2 : Y = D[2];
- 3 : Y = D[3];
- 4 : Y = D[4];
- 5 : Y = D[5];
- 6 : Y = D[6];
- 7 : Y = D[7];
- endcase
-end
-
-endmodule
-
-module mux16 (D, S, Y);
- input [15:0] D;
- input [3:0] S;
- output Y;
-
-assign Y = D[S];
-
-endmodule