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author | whitequark <whitequark@whitequark.org> | 2019-01-18 23:22:02 +0000 |
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committer | whitequark <whitequark@whitequark.org> | 2019-01-18 23:22:19 +0000 |
commit | 95b6c3588222564b86cfa73f0601be44e3af5786 (patch) | |
tree | 782154b88c14c839bd7640fd144d16f94a594062 /tests/asicworld/code_hdl_models_misc1.v | |
parent | f3556e9f7ac6947be440a51699af773655de4911 (diff) | |
download | yosys-95b6c3588222564b86cfa73f0601be44e3af5786.tar.gz yosys-95b6c3588222564b86cfa73f0601be44e3af5786.tar.bz2 yosys-95b6c3588222564b86cfa73f0601be44e3af5786.zip |
proc_clean: fix fully def check to consider compare/signal length.
Fixes #790.
Diffstat (limited to 'tests/asicworld/code_hdl_models_misc1.v')
0 files changed, 0 insertions, 0 deletions