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authorDavid Shah <dave@ds0.me>2019-07-08 21:04:33 +0100
committerGitHub <noreply@github.com>2019-07-08 21:04:33 +0100
commit22334fea403fb94dc2b6b583b2f681527c21883e (patch)
tree7a5afb53626bbe7ca940c984716bd5d19fbee609 /tests/asicworld/code_verilog_tutorial_multiply.v
parent030483ffb909ab38e10d437d09ec922cb0ad2ce8 (diff)
parent4f798cda9d1b05d141e16a21b9e357de364021de (diff)
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Merge pull request #1160 from ZirconiumX/cyclone_v
synth_intel: Warn about untested Quartus backend
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