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authorAhmed Irfan <ahmedirfan1983@gmail.com>2014-09-22 11:35:04 +0200
committerAhmed Irfan <ahmedirfan1983@gmail.com>2014-09-22 11:35:04 +0200
commitd3c67ad9b61f602de1100cd264efd227dcacb417 (patch)
tree88c462c53bdab128cd1edbded42483772f82612a /tests/hana/test_simulation_decoder_2_test.v
parentb783dbe148e6d246ebd107c0913de2989ab5af48 (diff)
parent13117bb346dd02d2345f716b4403239aebe3d0e2 (diff)
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Merge branch 'master' of https://github.com/cliffordwolf/yosys into btor
added case for memwr cell that is used in muxes (same cell is used more than one time) corrected bug for xnor and logic_not added pmux cell translation Conflicts: backends/btor/btor.cc
Diffstat (limited to 'tests/hana/test_simulation_decoder_2_test.v')
-rw-r--r--tests/hana/test_simulation_decoder_2_test.v14
1 files changed, 0 insertions, 14 deletions
diff --git a/tests/hana/test_simulation_decoder_2_test.v b/tests/hana/test_simulation_decoder_2_test.v
deleted file mode 100644
index 5bdf19717..000000000
--- a/tests/hana/test_simulation_decoder_2_test.v
+++ /dev/null
@@ -1,14 +0,0 @@
-module test (input [1:0] in, input enable, output reg out);
-
-always @(in or enable)
- if(!enable)
- out = 4'b0000;
- else begin
- case (in)
- 2'b00 : out = 0 ;
- 2'b01 : out = 1;
- 2'b10 : out = 0;
- 2'b11 : out = 1;
- endcase
- end
-endmodule