diff options
| author | Clifford Wolf <clifford@clifford.at> | 2019-03-28 09:32:05 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-03-28 09:32:05 +0100 |
| commit | 32bd0f22ec93202e67395901cdc64c20df7f0da7 (patch) | |
| tree | 4c438282926d7bac304ad3ad6ad89523c4c1d784 /tests/liberty/processdefs.lib | |
| parent | 662429cc49bb2b2f2dd53f05a3ef903b78e43345 (diff) | |
| parent | 263ab60b43f3994e83bfa46b793669147d765bcc (diff) | |
| download | yosys-32bd0f22ec93202e67395901cdc64c20df7f0da7.tar.gz yosys-32bd0f22ec93202e67395901cdc64c20df7f0da7.tar.bz2 yosys-32bd0f22ec93202e67395901cdc64c20df7f0da7.zip | |
Merge pull request #901 from trcwm/libertyfixes
Libertyfixes: accept superfluous ; at end of group.
Diffstat (limited to 'tests/liberty/processdefs.lib')
| -rw-r--r-- | tests/liberty/processdefs.lib | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/tests/liberty/processdefs.lib b/tests/liberty/processdefs.lib new file mode 100644 index 000000000..37a6bbaf8 --- /dev/null +++ b/tests/liberty/processdefs.lib @@ -0,0 +1,48 @@ +/********************************************/ +/* */ +/* Supergate cell library for Bench marking */ +/* */ +/* Symbiotic EDA GmbH / Moseley Instruments */ +/* Niels A. Moseley */ +/* */ +/* Process: none */ +/* */ +/* Date : 25-03-2019 */ +/* Version: 1.0 */ +/* */ +/********************************************/ + +library(processdefs) { + technology (cmos); + revision : 1.0; + + time_unit : "1ps"; + pulling_resistance_unit : "1kohm"; + voltage_unit : "1V"; + current_unit : "1uA"; + + capacitive_load_unit(1,ff); + + default_inout_pin_cap : 7.0; + default_input_pin_cap : 7.0; + default_output_pin_cap : 0.0; + default_fanout_load : 1.0; + + default_wire_load_capacitance : 0.1; + default_wire_load_resistance : 1.0e-3; + default_wire_load_area : 0.0; + + nom_process : 1.0; + nom_temperature : 25.0; + nom_voltage : 1.2; + + delay_model : generic_cmos; + + define_cell_area(bond_pads,pad_slots) + input_voltage(cmos) { + vil : 0.3 * VDD ; + vih : 0.7 * VDD ; + vimin : -0.5 ; + vimax : VDD + 0.5 ; + } +} |