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author | Marcelina KoĆcielnicka <mwk@0x04.net> | 2020-07-21 15:00:54 +0200 |
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committer | Marcelina KoĆcielnicka <mwk@0x04.net> | 2020-07-21 15:00:54 +0200 |
commit | dc07ae96774c649d23ea787e07d618670c7e93bf (patch) | |
tree | 04169026a40d40ca620dfa1ffc0ae6a4c04f7e8c /tests/proc | |
parent | 57af8499dfc3c35d7327107ad30c1124c646fefd (diff) | |
download | yosys-dc07ae96774c649d23ea787e07d618670c7e93bf.tar.gz yosys-dc07ae96774c649d23ea787e07d618670c7e93bf.tar.bz2 yosys-dc07ae96774c649d23ea787e07d618670c7e93bf.zip |
techmap: Add _TECHMAP_CELLNAME_ special parameter.
This parameter will resolve to the name of the cell being mapped. The
first user of this parameter will be synth_intel_alm's Quartus output,
which requires a unique (and preferably descriptive) name passed as
a cell parameter for the memory cells.
Diffstat (limited to 'tests/proc')
0 files changed, 0 insertions, 0 deletions