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| author | Miodrag Milanović <mmicko@gmail.com> | 2022-02-21 17:57:44 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-02-21 17:57:44 +0100 |
| commit | d0b72e75d95828743b38184ee977c3c56f259b38 (patch) | |
| tree | d4cdb702831ad471a26c4f96f70900f701166a05 /tests/sim/run-test.sh | |
| parent | d0f4d0b153572ddee5f19831f40b9c40eb480db0 (diff) | |
| parent | fd3f08753a2c577bb87ad332329213c58d4a9326 (diff) | |
| download | yosys-d0b72e75d95828743b38184ee977c3c56f259b38.tar.gz yosys-d0b72e75d95828743b38184ee977c3c56f259b38.tar.bz2 yosys-d0b72e75d95828743b38184ee977c3c56f259b38.zip | |
Merge pull request #3203 from YosysHQ/micko/sim_ff
Simulation for various FF types
Diffstat (limited to 'tests/sim/run-test.sh')
| -rwxr-xr-x | tests/sim/run-test.sh | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/tests/sim/run-test.sh b/tests/sim/run-test.sh new file mode 100755 index 000000000..d34d1f3c9 --- /dev/null +++ b/tests/sim/run-test.sh @@ -0,0 +1,12 @@ +#!/usr/bin/env bash +set -eu +source ../gen-tests-makefile.sh +echo "Generate FST for sim models" +find tb/* -name tb*.v | while read name; do + test_name=$(basename -s .v $name) + echo "Test $test_name" + verilog_name=${test_name:3}.v + iverilog -o tb/$test_name.out $name $verilog_name + ./tb/$test_name.out -fst +done +run_tests --yosys-scripts --bash --yosys-args "-w 'Yosys has only limited support for tri-state logic at the moment.'" |