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author | Miodrag Milanović <mmicko@gmail.com> | 2022-02-21 17:57:44 +0100 |
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committer | GitHub <noreply@github.com> | 2022-02-21 17:57:44 +0100 |
commit | d0b72e75d95828743b38184ee977c3c56f259b38 (patch) | |
tree | d4cdb702831ad471a26c4f96f70900f701166a05 /tests/sim/sim_sdffe.ys | |
parent | d0f4d0b153572ddee5f19831f40b9c40eb480db0 (diff) | |
parent | fd3f08753a2c577bb87ad332329213c58d4a9326 (diff) | |
download | yosys-d0b72e75d95828743b38184ee977c3c56f259b38.tar.gz yosys-d0b72e75d95828743b38184ee977c3c56f259b38.tar.bz2 yosys-d0b72e75d95828743b38184ee977c3c56f259b38.zip |
Merge pull request #3203 from YosysHQ/micko/sim_ff
Simulation for various FF types
Diffstat (limited to 'tests/sim/sim_sdffe.ys')
-rw-r--r-- | tests/sim/sim_sdffe.ys | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/tests/sim/sim_sdffe.ys b/tests/sim/sim_sdffe.ys new file mode 100644 index 000000000..044f78eb3 --- /dev/null +++ b/tests/sim/sim_sdffe.ys @@ -0,0 +1,6 @@ +read_verilog sdffe.v +proc +opt_dff +stat +select -assert-count 1 t:$sdffe +sim -clock clk -r tb_sdffe.fst -scope tb_sdffe.uut -sim-cmp sdffe |