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authorN. Engelhardt <nak@symbioticeda.com>2020-01-03 12:28:48 +0100
committerN. Engelhardt <nak@symbioticeda.com>2020-01-03 12:28:48 +0100
commit341fd872b59e8f95aa14afd9f17225d2c03a4283 (patch)
tree21802e73ca767d124971d43d3f78d9f4cf7d62e2 /tests/simple/mem_arst.v
parentc8bc1793a4e8230c29fca4a34862414e8ab8722b (diff)
parentf8d5920a7e61f78873b7bf49dd7e8f3a83f7adf3 (diff)
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Merge branch 'master' of https://github.com/YosysHQ/yosys into abc_scratchpad_script
Diffstat (limited to 'tests/simple/mem_arst.v')
-rw-r--r--tests/simple/mem_arst.v4
1 files changed, 1 insertions, 3 deletions
diff --git a/tests/simple/mem_arst.v b/tests/simple/mem_arst.v
index 9bd38fcb3..88d0553b9 100644
--- a/tests/simple/mem_arst.v
+++ b/tests/simple/mem_arst.v
@@ -7,11 +7,9 @@ module MyMem #(
input Clk_i,
input [AddrWidth-1:0] Addr_i,
input [DataWidth-1:0] Data_i,
- output [DataWidth-1:0] Data_o,
+ output reg [DataWidth-1:0] Data_o,
input WR_i);
- reg [DataWidth-1:0] Data_o;
-
localparam Size = 2**AddrWidth;
(* mem2reg *)