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| author | Ruben Undheim <ruben.undheim@gmail.com> | 2018-10-20 11:58:25 +0200 |
|---|---|---|
| committer | Ruben Undheim <ruben.undheim@gmail.com> | 2018-10-20 11:58:25 +0200 |
| commit | 397dfccb304a12a40d34c4454a5cb4acee8be75f (patch) | |
| tree | 39f2bdcbfbc62de55f7333c0bcfb509735bf561a /tests/svinterfaces/runone.sh | |
| parent | d9a438101298710b9dadd4e7a1cb0041e8ba4199 (diff) | |
| download | yosys-397dfccb304a12a40d34c4454a5cb4acee8be75f.tar.gz yosys-397dfccb304a12a40d34c4454a5cb4acee8be75f.tar.bz2 yosys-397dfccb304a12a40d34c4454a5cb4acee8be75f.zip | |
Support for SystemVerilog interfaces as a port in the top level module + test case
Diffstat (limited to 'tests/svinterfaces/runone.sh')
| -rwxr-xr-x | tests/svinterfaces/runone.sh | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/tests/svinterfaces/runone.sh b/tests/svinterfaces/runone.sh index 345801389..0adecc797 100755 --- a/tests/svinterfaces/runone.sh +++ b/tests/svinterfaces/runone.sh @@ -22,11 +22,14 @@ iverilog -g2012 ${TESTNAME}_syn.v iverilog -g2012 ${TESTNAME}_ref_syn.v set +e - iverilog -g2012 ${TESTNAME}_tb.v ${TESTNAME}_ref_syn.v ./a.out mv output.txt reference_result.txt -iverilog -g2012 ${TESTNAME}_tb.v ${TESTNAME}_syn.v +if [ -f ${TESTNAME}_wrapper.v ] ; then + iverilog -g2012 ${TESTNAME}_tb_wrapper.v ${TESTNAME}_syn.v +else + iverilog -g2012 ${TESTNAME}_tb.v ${TESTNAME}_syn.v +fi ./a.out mv output.txt dut_result.txt |