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| author | Udi Finkelstein <github@udifink.com> | 2019-05-03 03:10:43 +0300 |
|---|---|---|
| committer | Udi Finkelstein <github@udifink.com> | 2019-05-03 03:10:43 +0300 |
| commit | ac10e7d96da4965751fd60a8dd42a8998c011c39 (patch) | |
| tree | 88926f01f42afee890ad8bed010977ce4b95a126 /tests/various/elab_sys_tasks.ys | |
| parent | 98925f6c4be611434e75f0ccf645a7ef8adcfc63 (diff) | |
| download | yosys-ac10e7d96da4965751fd60a8dd42a8998c011c39.tar.gz yosys-ac10e7d96da4965751fd60a8dd42a8998c011c39.tar.bz2 yosys-ac10e7d96da4965751fd60a8dd42a8998c011c39.zip | |
Initial implementation of elaboration system tasks
(IEEE1800-2017 section 20.11)
This PR allows us to use $info/$warning/$error/$fatal **at elaboration time** within a generate block.
This is very useful to stop a synthesis of a parametrized block when an
illegal combination of parameters is chosen.
Diffstat (limited to 'tests/various/elab_sys_tasks.ys')
| -rw-r--r-- | tests/various/elab_sys_tasks.ys | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/tests/various/elab_sys_tasks.ys b/tests/various/elab_sys_tasks.ys new file mode 100644 index 000000000..45bee3a60 --- /dev/null +++ b/tests/various/elab_sys_tasks.ys @@ -0,0 +1 @@ +read_verilog -sv elab_sys_tasks.sv |