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| author | Eddie Hung <eddie@fpgeh.com> | 2019-07-10 15:58:01 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-07-10 15:58:01 -0700 |
| commit | cea7441d8ae7df8d22f510e6a101ec46a9d7751e (patch) | |
| tree | 8067ba09ecfaf6d9cf32e8ed9adba42be27b86a4 /tests/various/specify.v | |
| parent | c865559f9540c29cb9c6302edc8b4a2620c0b49d (diff) | |
| parent | bb2144ae733f1a2c5e629a8251bfbdcc15559aa4 (diff) | |
| download | yosys-cea7441d8ae7df8d22f510e6a101ec46a9d7751e.tar.gz yosys-cea7441d8ae7df8d22f510e6a101ec46a9d7751e.tar.bz2 yosys-cea7441d8ae7df8d22f510e6a101ec46a9d7751e.zip | |
Merge remote-tracking branch 'origin/master' into xc7dsp
Diffstat (limited to 'tests/various/specify.v')
| -rw-r--r-- | tests/various/specify.v | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/tests/various/specify.v b/tests/various/specify.v index afc421da8..5d44d78f7 100644 --- a/tests/various/specify.v +++ b/tests/various/specify.v @@ -7,9 +7,11 @@ module test ( if (EN) Q <= D; specify - if (EN) (CLK *> (Q : D)) = (1, 2:3:4); +`ifndef SKIP_UNSUPPORTED_IGN_PARSER_CONSTRUCTS + if (EN) (posedge CLK *> (Q : D)) = (1, 2:3:4); $setup(D, posedge CLK &&& EN, 5); $hold(posedge CLK, D &&& EN, 6); +`endif endspecify endmodule @@ -28,3 +30,10 @@ module test2 ( (B => Q) = 1.5; endspecify endmodule + +module issue01144(input clk, d, output q); +specify + (posedge clk => (q +: d)) = (3,1); + (posedge clk *> (q +: d)) = (3,1); +endspecify +endmodule |