Merge remote-tracking branch 'origin/master' into xc7srl

31 files changed, 218 insertions, 5 deletions

diff --git a/tests/aiger/and.aag b/tests/aiger/and.aag
new file mode 100644
index 000000000..d1ef2c5a5
--- /dev/null
+++ b/tests/aiger/and.aag
@@ -0,0 +1,5 @@
+aag 3 2 0 1 1
+2
+4
+6
+6 2 4
diff --git a/tests/aiger/and.aig b/tests/aiger/and.aig
new file mode 100644
index 000000000..da0fa0719
--- /dev/null
+++ b/tests/aiger/and.aig
@@ -0,0 +1,3 @@
+aig 3 2 0 1 1
+6
+
\ No newline at end of file
diff --git a/tests/aiger/buffer.aag b/tests/aiger/buffer.aag
new file mode 100644
index 000000000..94a6fb1ed
--- /dev/null
+++ b/tests/aiger/buffer.aag
@@ -0,0 +1,3 @@
+aag 1 1 0 1 0
+2
+2
diff --git a/tests/aiger/buffer.aig b/tests/aiger/buffer.aig
new file mode 100644
index 000000000..0c715fdeb
--- /dev/null
+++ b/tests/aiger/buffer.aig
@@ -0,0 +1,2 @@
+aig 1 1 0 1 0
+2
diff --git a/tests/aiger/cnt1.aag b/tests/aiger/cnt1.aag
new file mode 100644
index 000000000..ce4f28fcb
--- /dev/null
+++ b/tests/aiger/cnt1.aag
@@ -0,0 +1,3 @@
+aag 1 0 1 0 0 1
+2 3
+2
diff --git a/tests/aiger/cnt1.aig b/tests/aiger/cnt1.aig
new file mode 100644
index 000000000..8d0ba13b1
--- /dev/null
+++ b/tests/aiger/cnt1.aig
@@ -0,0 +1,3 @@
+aig 1 0 1 0 0 1
+3
+2
diff --git a/tests/aiger/cnt1e.aag b/tests/aiger/cnt1e.aag
new file mode 100644
index 000000000..6db3f0ffd
--- /dev/null
+++ b/tests/aiger/cnt1e.aag
@@ -0,0 +1,8 @@
+aag 5 1 1 0 3 1
+2
+4 10
+4
+6 5 3
+8 4 2
+10 9 7
+b0 AIGER_NEVER
diff --git a/tests/aiger/cnt1e.aig b/tests/aiger/cnt1e.aig
new file mode 100644
index 000000000..d8d159f11
--- /dev/null
+++ b/tests/aiger/cnt1e.aig
@@ -0,0 +1,4 @@
+aig 5 1 1 0 3 1
+10
+4
+

b0 AIGER_NEVER
diff --git a/tests/aiger/empty.aag b/tests/aiger/empty.aag
new file mode 100644
index 000000000..40c0f00cb
--- /dev/null
+++ b/tests/aiger/empty.aag
@@ -0,0 +1 @@
+aag 0 0 0 0 0
diff --git a/tests/aiger/empty.aig b/tests/aiger/empty.aig
new file mode 100644
index 000000000..a28373cd3
--- /dev/null
+++ b/tests/aiger/empty.aig
@@ -0,0 +1 @@
+aig 0 0 0 0 0
diff --git a/tests/aiger/false.aag b/tests/aiger/false.aag
new file mode 100644
index 000000000..421e64a91
--- /dev/null
+++ b/tests/aiger/false.aag
@@ -0,0 +1,2 @@
+aag 0 0 0 1 0
+0
diff --git a/tests/aiger/false.aig b/tests/aiger/false.aig
new file mode 100644
index 000000000..ad7d039fa
--- /dev/null
+++ b/tests/aiger/false.aig
@@ -0,0 +1,2 @@
+aig 0 0 0 1 0
+0
diff --git a/tests/aiger/halfadder.aag b/tests/aiger/halfadder.aag
new file mode 100644
index 000000000..5bf54d38d
--- /dev/null
+++ b/tests/aiger/halfadder.aag
@@ -0,0 +1,14 @@
+aag 7 2 0 2 3
+2
+4
+6
+12
+6 13 15
+12 2 4
+14 3 5
+i0 x
+i1 y
+o0 s
+o1 c
+c
+half adder
diff --git a/tests/aiger/halfadder.aig b/tests/aiger/halfadder.aig
new file mode 100644
index 000000000..83727ee63
--- /dev/null
+++ b/tests/aiger/halfadder.aig
@@ -0,0 +1,9 @@
+aig 5 2 0 2 3
+10
+6
+
i0 x
+i1 y
+o0 s
+o1 c
+c
+half adder
diff --git a/tests/aiger/inverter.aag b/tests/aiger/inverter.aag
new file mode 100644
index 000000000..ff7c28542
--- /dev/null
+++ b/tests/aiger/inverter.aag
@@ -0,0 +1,3 @@
+aag 1 1 0 1 0
+2
+3
diff --git a/tests/aiger/inverter.aig b/tests/aiger/inverter.aig
new file mode 100644
index 000000000..525d82392
--- /dev/null
+++ b/tests/aiger/inverter.aig
@@ -0,0 +1,2 @@
+aig 1 1 0 1 0
+3
diff --git a/tests/aiger/notcnt1.aag b/tests/aiger/notcnt1.aag
new file mode 100644
index 000000000..e92815f23
--- /dev/null
+++ b/tests/aiger/notcnt1.aag
@@ -0,0 +1,4 @@
+aag 1 0 1 0 0 1
+2 3
+3
+b0 AIGER_NEVER
diff --git a/tests/aiger/notcnt1.aig b/tests/aiger/notcnt1.aig
new file mode 100644
index 000000000..f8a667f1f
--- /dev/null
+++ b/tests/aiger/notcnt1.aig
@@ -0,0 +1,4 @@
+aig 1 0 1 0 0 1
+3
+3
+b0 AIGER_NEVER
diff --git a/tests/aiger/notcnt1e.aag b/tests/aiger/notcnt1e.aag
new file mode 100644
index 000000000..141c864f7
--- /dev/null
+++ b/tests/aiger/notcnt1e.aag
@@ -0,0 +1,8 @@
+aag 5 1 1 0 3 1
+2
+4 10
+5
+6 5 3
+8 4 2
+10 9 7
+b0 AIGER_NEVER
diff --git a/tests/aiger/notcnt1e.aig b/tests/aiger/notcnt1e.aig
new file mode 100644
index 000000000..7c85a7290
--- /dev/null
+++ b/tests/aiger/notcnt1e.aig
@@ -0,0 +1,4 @@
+aig 5 1 1 0 3 1
+10
+5
+

b0 AIGER_NEVER
diff --git a/tests/aiger/or.aag b/tests/aiger/or.aag
new file mode 100644
index 000000000..f780e339f
--- /dev/null
+++ b/tests/aiger/or.aag
@@ -0,0 +1,5 @@
+aag 3 2 0 1 1
+2
+4
+7
+6 3 5
diff --git a/tests/aiger/or.aig b/tests/aiger/or.aig
new file mode 100644
index 000000000..75c9e4480
--- /dev/null
+++ b/tests/aiger/or.aig
@@ -0,0 +1,3 @@
+aig 3 2 0 1 1
+7
+

\ No newline at end of file
diff --git a/tests/aiger/run-test.sh b/tests/aiger/run-test.sh
new file mode 100755
index 000000000..e0a34f023
--- /dev/null
+++ b/tests/aiger/run-test.sh
@@ -0,0 +1,24 @@
+#!/bin/bash
+
+OPTIND=1
+seed=""    # default to no seed specified
+while getopts "S:" opt
+do
+    case "$opt" in
+	S) arg="${OPTARG#"${OPTARG%%[![:space:]]*}"}" # remove leading space
+	   seed="SEED=$arg" ;;
+    esac
+done
+shift "$((OPTIND-1))"
+
+# check for Icarus Verilog
+if ! which iverilog > /dev/null ; then
+  echo "$0: Error: Icarus Verilog 'iverilog' not found."
+  exit 1
+fi
+
+echo "===== AAG ======"
+${MAKE:-make} -f ../tools/autotest.mk $seed *.aag EXTRA_FLAGS="-f aiger"
+
+echo "===== AIG ======"
+exec ${MAKE:-make} -f ../tools/autotest.mk $seed *.aig EXTRA_FLAGS="-f aiger"
diff --git a/tests/aiger/toggle-re.aag b/tests/aiger/toggle-re.aag
new file mode 100644
index 000000000..b662bb386
--- /dev/null
+++ b/tests/aiger/toggle-re.aag
@@ -0,0 +1,14 @@
+aag 7 2 1 2 4
+2
+4
+6 8
+6
+7
+8 4 10
+10 13 15
+12 2 6
+14 3 7
+i0 enable
+i1 reset
+o0 Q
+o1 !Q
diff --git a/tests/aiger/toggle-re.aig b/tests/aiger/toggle-re.aig
new file mode 100644
index 000000000..9d6730f21
--- /dev/null
+++ b/tests/aiger/toggle-re.aig
@@ -0,0 +1,8 @@
+aig 7 2 1 2 4
+14
+6
+7
+
i0 enable
+i1 reset
+o0 Q
+o1 !Q
diff --git a/tests/aiger/toggle.aag b/tests/aiger/toggle.aag
new file mode 100644
index 000000000..09651012d
--- /dev/null
+++ b/tests/aiger/toggle.aag
@@ -0,0 +1,4 @@
+aag 1 0 1 2 0
+2 3
+2
+3
diff --git a/tests/aiger/toggle.aig b/tests/aiger/toggle.aig
new file mode 100644
index 000000000..b69e21aaf
--- /dev/null
+++ b/tests/aiger/toggle.aig
@@ -0,0 +1,4 @@
+aig 1 0 1 2 0
+3
+2
+3
diff --git a/tests/aiger/true.aag b/tests/aiger/true.aag
new file mode 100644
index 000000000..366893648
--- /dev/null
+++ b/tests/aiger/true.aag
@@ -0,0 +1,2 @@
+aag 0 0 0 1 0
+1
diff --git a/tests/aiger/true.aig b/tests/aiger/true.aig
new file mode 100644
index 000000000..10086f389
--- /dev/null
+++ b/tests/aiger/true.aig
@@ -0,0 +1,2 @@
+aig 0 0 0 1 0
+1
diff --git a/tests/simple/generate.v b/tests/simple/generate.v
index 24eb4462c..3c55682cb 100644
--- a/tests/simple/generate.v
+++ b/tests/simple/generate.v
@@ -90,5 +90,61 @@ generate
 		endcase
 	end
 endgenerate
+endmodule
+
+// ------------------------------------------
+
+module gen_test4(a, b);
+
+input [3:0] a;
+output [3:0] b;
+
+genvar i;
+generate
+	for (i=0; i < 3; i=i+1) begin : foo
+		localparam PREV = i - 1;
+		wire temp;
+		if (i == 0)
+			assign temp = a[0];
+		else
+			assign temp = foo[PREV].temp & a[i];
+		assign b[i] = temp;
+	end
+endgenerate
+endmodule
+
+// ------------------------------------------
+
+module gen_test5(input_bits, out);
+
+parameter WIDTH = 256;
+parameter CHUNK = 4;
 
+input [WIDTH-1:0] input_bits;
+output out;
+
+genvar step, i, j;
+generate
+	for (step = 1; step <= WIDTH; step = step * CHUNK) begin : steps
+		localparam PREV = step / CHUNK;
+		localparam DIM = WIDTH / step;
+		for (i = 0; i < DIM; i = i + 1) begin : outer
+			localparam LAST_START = i * CHUNK;
+			for (j = 0; j < CHUNK; j = j + 1) begin : inner
+				wire temp;
+				if (step == 1)
+					assign temp = input_bits[i];
+				else if (j == 0)
+					assign temp = steps[PREV].outer[LAST_START].val;
+				else
+					assign temp
+						= steps[step].outer[i].inner[j-1].temp
+						& steps[PREV].outer[LAST_START + j].val;
+			end
+			wire val;
+			assign val = steps[step].outer[i].inner[CHUNK - 1].temp;
+		end
+	end
+endgenerate
+assign out = steps[WIDTH].outer[0].val;
 endmodule
diff --git a/tests/tools/autotest.sh b/tests/tools/autotest.sh
index 84e62e011..f3dac504e 100755
--- a/tests/tools/autotest.sh
+++ b/tests/tools/autotest.sh
@@ -108,8 +108,9 @@ shift $((OPTIND - 1))
 
 for fn
 do
-	bn=${fn%.v}
-	if [ "$bn" == "$fn" ]; then
+	bn=${fn%.*}
+	ext=${fn##*.}
+	if [[ "$ext" != "v" ]] && [[ "$ext" != "aag" ]] && [[ "$ext" != "aig" ]]; then
 		echo "Invalid argument: $fn" >&2
 		exit 1
 	fi
@@ -132,8 +133,12 @@ do
 		bn=$(basename $bn)
 
 		rm -f ${bn}_ref.fir
-
-		egrep -v '^\s*`timescale' ../$fn > ${bn}_ref.v
+		if [[ "$ext" == "v" ]]; then
+			egrep -v '^\s*`timescale' ../$fn > ${bn}_ref.${ext}
+		else
+			"$toolsdir"/../../yosys -f "$frontend $include_opts" -b "verilog" -o ${bn}_ref.v ../${fn}
+			frontend="verilog"
+		fi
 
 		if [ ! -f ../${bn}_tb.v ]; then
 			"$toolsdir"/../../yosys -f "$frontend $include_opts" -b "test_autotb $autotb_opts" -o ${bn}_tb.v ${bn}_ref.v
@@ -141,7 +146,8 @@ do
 			cp ../${bn}_tb.v ${bn}_tb.v
 		fi
 		if $genvcd; then sed -i 's,// \$dump,$dump,g' ${bn}_tb.v; fi
-		compile_and_run ${bn}_tb_ref ${bn}_out_ref ${bn}_tb.v ${bn}_ref.v $libs
+		compile_and_run ${bn}_tb_ref ${bn}_out_ref ${bn}_tb.v ${bn}_ref.v $libs \
+					"$toolsdir"/../../techlibs/common/simlib.v
 		if $genvcd; then mv testbench.vcd ${bn}_ref.vcd; fi
 
 		test_count=0