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author | whitequark <whitequark@whitequark.org> | 2020-08-27 11:28:31 +0000 |
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committer | GitHub <noreply@github.com> | 2020-08-27 11:28:31 +0000 |
commit | 2d10d59d93497d0791a5f2be9386b3df05c838d5 (patch) | |
tree | f5e74282619edf25cfb3d586951e3955286ec655 /tests | |
parent | 702f7c0253dcf9410050586a5e56da044e3277a3 (diff) | |
parent | 9f0892159ebb88964839ea2cb5313ef1b87c624d (diff) | |
download | yosys-2d10d59d93497d0791a5f2be9386b3df05c838d5.tar.gz yosys-2d10d59d93497d0791a5f2be9386b3df05c838d5.tar.bz2 yosys-2d10d59d93497d0791a5f2be9386b3df05c838d5.zip |
Merge pull request #2356 from whitequark/flatten-techmap-no-tpl_driven-sigmap
flatten, techmap: don't canonicalize tpl driven bits via sigmap
Diffstat (limited to 'tests')
-rw-r--r-- | tests/techmap/bug2183.ys | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/tests/techmap/bug2183.ys b/tests/techmap/bug2183.ys new file mode 100644 index 000000000..8dd09458e --- /dev/null +++ b/tests/techmap/bug2183.ys @@ -0,0 +1,11 @@ +read_verilog <<EOT +module foo(inout a, b); + assign a = b; +endmodule +module bar(output c); + foo f(c, 1'b0); +endmodule +EOT + +hierarchy -auto-top +flatten |