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| author | Pepijn de Vos <pepijndevos@gmail.com> | 2019-12-03 16:56:15 +0100 |
|---|---|---|
| committer | Pepijn de Vos <pepijndevos@gmail.com> | 2019-12-03 16:56:15 +0100 |
| commit | a7d34a7cb5c0a36139b55e35e75607599d0c2b97 (patch) | |
| tree | 37ae1e7723c27b2a7532d530c0c0572eb185f14b /tests | |
| parent | a3b25b4af899b78d7401ec2ea7cd988d6209e226 (diff) | |
| download | yosys-a7d34a7cb5c0a36139b55e35e75607599d0c2b97.tar.gz yosys-a7d34a7cb5c0a36139b55e35e75607599d0c2b97.tar.bz2 yosys-a7d34a7cb5c0a36139b55e35e75607599d0c2b97.zip | |
update test
Diffstat (limited to 'tests')
| -rw-r--r-- | tests/arch/gowin/adffs.ys | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/tests/arch/gowin/adffs.ys b/tests/arch/gowin/adffs.ys index fc7ee01f2..87fba83a6 100644 --- a/tests/arch/gowin/adffs.ys +++ b/tests/arch/gowin/adffs.ys @@ -34,11 +34,12 @@ proc equiv_opt -async2sync -assert -map +/gowin/cells_sim.v synth_gowin # equivalency check design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design) cd dffs # Constrain all select calls below inside the top module -select -assert-count 1 t:DFFS +select -assert-count 1 t:DFF +select -assert-count 1 t:LUT2 select -assert-count 4 t:IBUF select -assert-count 1 t:OBUF -select -assert-none t:DFFS t:IBUF t:OBUF %% t:* %D +select -assert-none t:DFF t:LUT2 t:IBUF t:OBUF %% t:* %D design -load read |