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authorEddie Hung <eddieh@ece.ubc.ca>2019-04-15 18:39:20 -0700
committerGitHub <noreply@github.com>2019-04-15 18:39:20 -0700
commitdca45c0888c44857038bd65b6f51f6d9f67b169f (patch)
treee0f3cbeb15e8b69a0177fc081dc1732a250e10f3 /tests
parent18a40458588f04bf7a3d30fde8fead95cee00dee (diff)
parentb3378745fd993f48b8114fb08e5019b34374ee72 (diff)
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Merge pull request #937 from YosysHQ/revert-932-eddie/fixdlatch
Revert "Recognise default entry in case even if all cases covered (fix for #931)"
Diffstat (limited to 'tests')
-rw-r--r--tests/various/muxcover.ys5
1 files changed, 2 insertions, 3 deletions
diff --git a/tests/various/muxcover.ys b/tests/various/muxcover.ys
index 594e62af6..7ac460f13 100644
--- a/tests/various/muxcover.ys
+++ b/tests/various/muxcover.ys
@@ -8,13 +8,12 @@ read_verilog -formal <<EOT
3'b?1?: Y = B;
3'b1??: Y = C;
3'b000: Y = D;
- default: Y = 'bx;
endcase
endmodule
EOT
-## Example usage for "pmuxtree" and "muxcover"
+## Examle usage for "pmuxtree" and "muxcover"
proc
pmuxtree
@@ -36,7 +35,7 @@ read_verilog -formal <<EOT
3'b010: Y = B;
3'b100: Y = C;
3'b000: Y = D;
- default: Y = 'bx;
+ default: Y = 'bx;
endcase
endmodule
EOT