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| author | Marcin Kościelnicki <koriakin@0x04.net> | 2019-09-10 16:31:50 +0000 |
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| committer | Marcin Kościelnicki <koriakin@0x04.net> | 2019-09-11 19:38:20 +0200 |
| commit | f72765090cd001ff4dc54d5a9c01a2d4b3339865 (patch) | |
| tree | c8eae3824f69f28c9e76b24fb5d6d88c45f3e2ef /tests | |
| parent | c7f1368cd273f1d84507d29548f3420a08a82702 (diff) | |
| download | yosys-f72765090cd001ff4dc54d5a9c01a2d4b3339865.tar.gz yosys-f72765090cd001ff4dc54d5a9c01a2d4b3339865.tar.bz2 yosys-f72765090cd001ff4dc54d5a9c01a2d4b3339865.zip | |
Add -match-init option to dff2dffs.
Diffstat (limited to 'tests')
| -rw-r--r-- | tests/techmap/dff2dffs.ys | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/tests/techmap/dff2dffs.ys b/tests/techmap/dff2dffs.ys new file mode 100644 index 000000000..13f1a3cf3 --- /dev/null +++ b/tests/techmap/dff2dffs.ys @@ -0,0 +1,50 @@ +read_verilog << EOT +module top(...); +input clk; +input d; +input sr; +output reg q0, q1, q2, q3, q4, q5; + +initial q0 = 1'b0; +initial q1 = 1'b0; +initial q2 = 1'b1; +initial q3 = 1'b1; +initial q4 = 1'bx; +initial q5 = 1'bx; + +always @(posedge clk) begin + q0 <= sr ? 1'b0 : d; + q1 <= sr ? 1'b1 : d; + q2 <= sr ? 1'b0 : d; + q3 <= sr ? 1'b1 : d; + q4 <= sr ? 1'b0 : d; + q5 <= sr ? 1'b1 : d; +end + +endmodule +EOT + +proc +simplemap +design -save ref + +dff2dffs +clean + +select -assert-count 1 w:q0 %x t:$__DFFS_PP0_ %i +select -assert-count 1 w:q1 %x t:$__DFFS_PP1_ %i +select -assert-count 1 w:q2 %x t:$__DFFS_PP0_ %i +select -assert-count 1 w:q3 %x t:$__DFFS_PP1_ %i +select -assert-count 1 w:q4 %x t:$__DFFS_PP0_ %i +select -assert-count 1 w:q5 %x t:$__DFFS_PP1_ %i + +design -load ref +dff2dffs -match-init +clean + +select -assert-count 1 w:q0 %x t:$__DFFS_PP0_ %i +select -assert-count 0 w:q1 %x t:$__DFFS_PP1_ %i +select -assert-count 0 w:q2 %x t:$__DFFS_PP0_ %i +select -assert-count 1 w:q3 %x t:$__DFFS_PP1_ %i +select -assert-count 1 w:q4 %x t:$__DFFS_PP0_ %i +select -assert-count 1 w:q5 %x t:$__DFFS_PP1_ %i |