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-rw-r--r--techlibs/sf2/cells_sim.v45
1 files changed, 24 insertions, 21 deletions
diff --git a/techlibs/sf2/cells_sim.v b/techlibs/sf2/cells_sim.v
index f3f7695cf..c62748b11 100644
--- a/techlibs/sf2/cells_sim.v
+++ b/techlibs/sf2/cells_sim.v
@@ -1,3 +1,27 @@
+// https://coredocs.s3.amazonaws.com/Libero/12_0_0/Tool/sf2_mlg.pdf
+
+module ADD2 (
+
+ input A, B,
+ output Y
+);
+ assign Y = A & B;
+endmodule
+
+module ADD3 (
+ input A, B, C,
+ output Y
+);
+ assign Y = A & B & C;
+endmodule
+
+module ADD4 (
+ input A, B, C, D,
+ output Y
+);
+ assign Y = A & B & C & D;
+endmodule
+
module CFG1 (
output Y,
input A
@@ -36,27 +60,6 @@ module CFG4 (
assign Y = INIT >> {D, C, B, A};
endmodule
-module ADD2 (
- input A, B,
- output Y
-);
- assign Y = A & B;
-endmodule
-
-module ADD3 (
- input A, B, C,
- output Y
-);
- assign Y = A & B & C;
-endmodule
-
-module ADD4 (
- input A, B, C, D,
- output Y
-);
- assign Y = A & B & C & D;
-endmodule
-
module BUFF (
input A,
output Y