diff options
| -rw-r--r-- | techlibs/common/Makefile.inc | 1 | ||||
| -rw-r--r-- | techlibs/common/gate2lut.v | 87 | ||||
| -rw-r--r-- | tests/lut/.gitignore | 1 | ||||
| -rw-r--r-- | tests/lut/check_map.ys | 13 | ||||
| -rw-r--r-- | tests/lut/map_and.v | 5 | ||||
| -rw-r--r-- | tests/lut/map_mux.v | 5 | ||||
| -rw-r--r-- | tests/lut/map_not.v | 5 | ||||
| -rw-r--r-- | tests/lut/map_or.v | 5 | ||||
| -rw-r--r-- | tests/lut/map_xor.v | 5 | ||||
| -rw-r--r-- | tests/lut/run-test.sh | 6 |
10 files changed, 133 insertions, 0 deletions
diff --git a/techlibs/common/Makefile.inc b/techlibs/common/Makefile.inc index ab961ac0b..70074f653 100644 --- a/techlibs/common/Makefile.inc +++ b/techlibs/common/Makefile.inc @@ -25,5 +25,6 @@ $(eval $(call add_share_file,share,techlibs/common/techmap.v)) $(eval $(call add_share_file,share,techlibs/common/pmux2mux.v)) $(eval $(call add_share_file,share,techlibs/common/adff2dff.v)) $(eval $(call add_share_file,share,techlibs/common/dff2ff.v)) +$(eval $(call add_share_file,share,techlibs/common/gate2lut.v)) $(eval $(call add_share_file,share,techlibs/common/cells.lib)) diff --git a/techlibs/common/gate2lut.v b/techlibs/common/gate2lut.v new file mode 100644 index 000000000..99c123f4a --- /dev/null +++ b/techlibs/common/gate2lut.v @@ -0,0 +1,87 @@ +(* techmap_celltype = "$_NOT_" *) +module _90_lut_not (A, Y); + input A; + output Y; + + wire [`LUT_WIDTH-1:0] AA; + assign AA = {A}; + + \$lut #( + .WIDTH(`LUT_WIDTH), + .LUT(4'b01) + ) lut ( + .A(AA), + .Y(Y) + ); +endmodule + +(* techmap_celltype = "$_OR_" *) +module _90_lut_or (A, B, Y); + input A, B; + output Y; + + wire [`LUT_WIDTH-1:0] AA; + assign AA = {B, A}; + + \$lut #( + .WIDTH(`LUT_WIDTH), + .LUT(4'b1110) + ) lut ( + .A(AA), + .Y(Y) + ); +endmodule + +(* techmap_celltype = "$_AND_" *) +module _90_lut_and (A, B, Y); + input A, B; + output Y; + + wire [`LUT_WIDTH-1:0] AA; + assign AA = {B, A}; + + \$lut #( + .WIDTH(`LUT_WIDTH), + .LUT(4'b1000) + ) lut ( + .A(AA), + .Y(Y) + ); +endmodule + +(* techmap_celltype = "$_XOR_" *) +module _90_lut_xor (A, B, Y); + input A, B; + output Y; + + wire [`LUT_WIDTH-1:0] AA; + assign AA = {B, A}; + + \$lut #( + .WIDTH(`LUT_WIDTH), + .LUT(4'b0110) + ) lut ( + .A(AA), + .Y(Y) + ); +endmodule + +(* techmap_celltype = "$_MUX_" *) +module _90_lut_mux (A, B, S, Y); + input A, B, S; + output Y; + + wire [`LUT_WIDTH-1:0] AA; + assign AA = {S, B, A}; + + \$lut #( + .WIDTH(`LUT_WIDTH), + // A 1010 1010 + // B 1100 1100 + // S 1111 0000 + .LUT(8'b_1100_1010) + ) lut ( + .A(AA), + .Y(Y) + ); +endmodule diff --git a/tests/lut/.gitignore b/tests/lut/.gitignore new file mode 100644 index 000000000..397b4a762 --- /dev/null +++ b/tests/lut/.gitignore @@ -0,0 +1 @@ +*.log diff --git a/tests/lut/check_map.ys b/tests/lut/check_map.ys new file mode 100644 index 000000000..6d659891f --- /dev/null +++ b/tests/lut/check_map.ys @@ -0,0 +1,13 @@ +design -save preopt + +simplemap +techmap -map +/gate2lut.v -D LUT_WIDTH=4 +select -assert-count 1 t:$lut +design -stash postopt + +design -copy-from preopt -as preopt top +design -copy-from postopt -as postopt top +equiv_make preopt postopt equiv +prep -flatten -top equiv +equiv_induct +equiv_status -assert diff --git a/tests/lut/map_and.v b/tests/lut/map_and.v new file mode 100644 index 000000000..68ae33fd6 --- /dev/null +++ b/tests/lut/map_and.v @@ -0,0 +1,5 @@ +module top(...); + input a, b; + output y; + assign y = a&b; +endmodule diff --git a/tests/lut/map_mux.v b/tests/lut/map_mux.v new file mode 100644 index 000000000..ccecf3023 --- /dev/null +++ b/tests/lut/map_mux.v @@ -0,0 +1,5 @@ +module top(...); + input a, b, s; + output y; + assign y = s?a:b; +endmodule diff --git a/tests/lut/map_not.v b/tests/lut/map_not.v new file mode 100644 index 000000000..385997414 --- /dev/null +++ b/tests/lut/map_not.v @@ -0,0 +1,5 @@ +module top(...); + input a; + output y; + assign y = ~a; +endmodule diff --git a/tests/lut/map_or.v b/tests/lut/map_or.v new file mode 100644 index 000000000..8b8c55188 --- /dev/null +++ b/tests/lut/map_or.v @@ -0,0 +1,5 @@ +module top(...); + input a, b; + output y; + assign y = a|b; +endmodule diff --git a/tests/lut/map_xor.v b/tests/lut/map_xor.v new file mode 100644 index 000000000..708a05789 --- /dev/null +++ b/tests/lut/map_xor.v @@ -0,0 +1,5 @@ +module top(...); + input a, b; + output y; + assign y = a^b; +endmodule diff --git a/tests/lut/run-test.sh b/tests/lut/run-test.sh new file mode 100644 index 000000000..207417fa6 --- /dev/null +++ b/tests/lut/run-test.sh @@ -0,0 +1,6 @@ +#!/bin/bash +set -e +for x in *.v; do + echo "Running $x.." + ../../yosys -q -s check_map.ys -l ${x%.v}.log $x +done |