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-rw-r--r--passes/techmap/abc9.cc3
1 files changed, 3 insertions, 0 deletions
diff --git a/passes/techmap/abc9.cc b/passes/techmap/abc9.cc
index edc07092b..3c4919b1f 100644
--- a/passes/techmap/abc9.cc
+++ b/passes/techmap/abc9.cc
@@ -403,6 +403,9 @@ void abc9_module(RTLIL::Design *design, RTLIL::Module *current_module, std::stri
RTLIL::Selection& sel = design->selection_stack.back();
sel.select(module);
+ // Behave as for "abc" where BLIF writer implicitly outputs all undef as zero
+ Pass::call(design, "setundef -zero");
+
Pass::call(design, "aigmap");
handle_loops(design);