diff options
Diffstat (limited to 'examples/igloo2')
| -rw-r--r-- | examples/igloo2/.gitignore | 4 | ||||
| -rw-r--r-- | examples/igloo2/example.pdc | 1 | ||||
| -rw-r--r-- | examples/igloo2/example.sdc | 1 | ||||
| -rw-r--r-- | examples/igloo2/example.v | 5 | ||||
| -rw-r--r-- | examples/igloo2/example.ys | 3 | ||||
| -rw-r--r-- | examples/igloo2/libero.tcl | 40 | ||||
| -rw-r--r-- | examples/igloo2/runme.sh | 3 |
7 files changed, 37 insertions, 20 deletions
diff --git a/examples/igloo2/.gitignore b/examples/igloo2/.gitignore index fa3c3d7ed..ea58efc9f 100644 --- a/examples/igloo2/.gitignore +++ b/examples/igloo2/.gitignore @@ -1,3 +1,3 @@ /netlist.edn -/netlist.v -/work +/netlist.vm +/proj diff --git a/examples/igloo2/example.pdc b/examples/igloo2/example.pdc new file mode 100644 index 000000000..e6ffd53db --- /dev/null +++ b/examples/igloo2/example.pdc @@ -0,0 +1 @@ +# Add placement constraints here diff --git a/examples/igloo2/example.sdc b/examples/igloo2/example.sdc new file mode 100644 index 000000000..c6ff94161 --- /dev/null +++ b/examples/igloo2/example.sdc @@ -0,0 +1 @@ +# Add timing constraints here diff --git a/examples/igloo2/example.v b/examples/igloo2/example.v index 3eb7007c5..1a1967d5a 100644 --- a/examples/igloo2/example.v +++ b/examples/igloo2/example.v @@ -1,5 +1,6 @@ -module top ( +module example ( input clk, + input EN, output LED1, output LED2, output LED3, @@ -14,7 +15,7 @@ module top ( reg [BITS-1:0] outcnt; always @(posedge clk) begin - counter <= counter + 1; + counter <= counter + EN; outcnt <= counter >> LOG2DELAY; end diff --git a/examples/igloo2/example.ys b/examples/igloo2/example.ys deleted file mode 100644 index 872f97b99..000000000 --- a/examples/igloo2/example.ys +++ /dev/null @@ -1,3 +0,0 @@ -read_verilog example.v -synth_sf2 -top top -edif netlist.edn -write_verilog netlist.v diff --git a/examples/igloo2/libero.tcl b/examples/igloo2/libero.tcl index 9f6d3b792..1f3476316 100644 --- a/examples/igloo2/libero.tcl +++ b/examples/igloo2/libero.tcl @@ -1,24 +1,36 @@ # Run with "libero SCRIPT:libero.tcl" +file delete -force proj + new_project \ - -name top \ - -location work \ + -name example \ + -location proj \ + -block_mode 0 \ + -hdl "VERILOG" \ -family IGLOO2 \ -die PA4MGL500 \ -package tq144 \ - -speed -1 \ - -hdl VERILOG + -speed -1 -# import_files -edif "[pwd]/netlist.edn" +import_files -hdl_source {netlist.vm} +import_files -sdc {example.sdc} +import_files -io_pdc {example.pdc} +set_option -synth 0 -import_files -hdl_source "[pwd]/netlist.v" -set_root top +organize_tool_files -tool PLACEROUTE \ + -file {proj/constraint/example.sdc} \ + -file {proj/constraint/io/example.pdc} \ + -input_type constraint -save_project +organize_tool_files -tool VERIFYTIMING \ + -file {proj/constraint/example.sdc} \ + -input_type constraint -puts "**> SYNTHESIZE" -run_tool -name {SYNTHESIZE} -puts "<** SYNTHESIZE" +configure_tool -name PLACEROUTE \ + -params TDPR:true \ + -params PDPR:false \ + -params EFFORT_LEVEL:false \ + -params REPAIR_MIN_DELAY:false puts "**> COMPILE" run_tool -name {COMPILE} @@ -28,6 +40,12 @@ puts "**> PLACEROUTE" run_tool -name {PLACEROUTE} puts "<** PLACEROUTE" +puts "**> VERIFYTIMING" +run_tool -name {VERIFYTIMING} +puts "<** VERIFYTIMING" + +save_project + # puts "**> export_bitstream" # export_bitstream_file -trusted_facility_file 1 -trusted_facility_file_components {FABRIC} # puts "<** export_bitstream" diff --git a/examples/igloo2/runme.sh b/examples/igloo2/runme.sh index 4edfb5409..54247759f 100644 --- a/examples/igloo2/runme.sh +++ b/examples/igloo2/runme.sh @@ -1,5 +1,4 @@ #!/bin/bash set -ex -rm -rf work -yosys example.ys +yosys -p 'synth_sf2 -top example -edif netlist.edn -vlog netlist.vm' example.v LM_LICENSE_FILE=1702@`hostname` /opt/microsemi/Libero_SoC_v11.9/Libero/bin/libero SCRIPT:libero.tcl |