6 files changed, 85 insertions, 0 deletions
diff --git a/examples/igloo2/.gitignore b/examples/igloo2/.gitignore
new file mode 100644
index 000000000..ea58efc9f
--- /dev/null
+++ b/examples/igloo2/.gitignore
@@ -0,0 +1,3 @@
+/netlist.edn
+/netlist.vm
+/proj
diff --git a/examples/igloo2/example.pdc b/examples/igloo2/example.pdc
new file mode 100644
index 000000000..e6ffd53db
--- /dev/null
+++ b/examples/igloo2/example.pdc
@@ -0,0 +1 @@
+# Add placement constraints here
diff --git a/examples/igloo2/example.sdc b/examples/igloo2/example.sdc
new file mode 100644
index 000000000..c6ff94161
--- /dev/null
+++ b/examples/igloo2/example.sdc
@@ -0,0 +1 @@
+# Add timing constraints here
diff --git a/examples/igloo2/example.v b/examples/igloo2/example.v
new file mode 100644
index 000000000..1a1967d5a
--- /dev/null
+++ b/examples/igloo2/example.v
@@ -0,0 +1,23 @@
+module example (
+	input  clk,
+	input  EN,
+	output LED1,
+	output LED2,
+	output LED3,
+	output LED4,
+	output LED5
+);
+
+	localparam BITS = 5;
+	localparam LOG2DELAY = 22;
+
+	reg [BITS+LOG2DELAY-1:0] counter = 0;
+	reg [BITS-1:0] outcnt;
+
+	always @(posedge clk) begin
+		counter <= counter + EN;
+		outcnt <= counter >> LOG2DELAY;
+	end
+
+	assign {LED1, LED2, LED3, LED4, LED5} = outcnt ^ (outcnt >> 1);
+endmodule
diff --git a/examples/igloo2/libero.tcl b/examples/igloo2/libero.tcl
new file mode 100644
index 000000000..1f3476316
--- /dev/null
+++ b/examples/igloo2/libero.tcl
@@ -0,0 +1,53 @@
+# Run with "libero SCRIPT:libero.tcl"
+
+file delete -force proj
+
+new_project \
+    -name example \
+    -location proj \
+    -block_mode 0 \
+    -hdl "VERILOG" \
+    -family IGLOO2 \
+    -die PA4MGL500 \
+    -package tq144 \
+    -speed -1
+
+import_files -hdl_source {netlist.vm}
+import_files -sdc {example.sdc}
+import_files -io_pdc {example.pdc}
+set_option -synth 0
+
+organize_tool_files -tool PLACEROUTE \
+    -file {proj/constraint/example.sdc} \
+    -file {proj/constraint/io/example.pdc} \
+    -input_type constraint
+
+organize_tool_files -tool VERIFYTIMING \
+    -file {proj/constraint/example.sdc} \
+    -input_type constraint
+
+configure_tool -name PLACEROUTE \
+    -params TDPR:true \
+    -params PDPR:false \
+    -params EFFORT_LEVEL:false \
+    -params REPAIR_MIN_DELAY:false
+
+puts "**> COMPILE"
+run_tool -name {COMPILE}
+puts "<** COMPILE"
+
+puts "**> PLACEROUTE"
+run_tool -name {PLACEROUTE}
+puts "<** PLACEROUTE"
+
+puts "**> VERIFYTIMING"
+run_tool -name {VERIFYTIMING}
+puts "<** VERIFYTIMING"
+
+save_project
+
+# puts "**> export_bitstream"
+# export_bitstream_file -trusted_facility_file 1 -trusted_facility_file_components {FABRIC}
+# puts "<** export_bitstream"
+
+exit 0
diff --git a/examples/igloo2/runme.sh b/examples/igloo2/runme.sh
new file mode 100644
index 000000000..54247759f
--- /dev/null
+++ b/examples/igloo2/runme.sh
@@ -0,0 +1,4 @@
+#!/bin/bash
+set -ex
+yosys -p 'synth_sf2 -top example -edif netlist.edn -vlog netlist.vm' example.v
+LM_LICENSE_FILE=1702@`hostname` /opt/microsemi/Libero_SoC_v11.9/Libero/bin/libero SCRIPT:libero.tcl