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-rw-r--r--frontends/aiger/aigerparse.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/frontends/aiger/aigerparse.h b/frontends/aiger/aigerparse.h
index 28f40279b..7d6d70b2c 100644
--- a/frontends/aiger/aigerparse.h
+++ b/frontends/aiger/aigerparse.h
@@ -42,6 +42,7 @@ struct AigerReader
std::vector<RTLIL::Wire*> inputs;
std::vector<RTLIL::Wire*> latches;
std::vector<RTLIL::Wire*> outputs;
+ std::vector<RTLIL::Wire*> bad_properties;
std::vector<RTLIL::Cell*> boxes;
AigerReader(RTLIL::Design *design, std::istream &f, RTLIL::IdString module_name, RTLIL::IdString clk_name, std::string map_filename, bool wideports);