diff options
Diffstat (limited to 'frontends')
-rw-r--r-- | frontends/ilang/ilang_parser.y | 4 | ||||
-rw-r--r-- | frontends/verilog/verilog_parser.y | 10 |
2 files changed, 9 insertions, 5 deletions
diff --git a/frontends/ilang/ilang_parser.y b/frontends/ilang/ilang_parser.y index b4b9693da..4e0b62edd 100644 --- a/frontends/ilang/ilang_parser.y +++ b/frontends/ilang/ilang_parser.y @@ -430,10 +430,14 @@ sigspec: free($1); } | sigspec '[' TOK_INT ']' { + if ($3 >= $1->size() || $3 < 0) + rtlil_frontend_ilang_yyerror("bit index out of range"); $$ = new RTLIL::SigSpec($1->extract($3)); delete $1; } | sigspec '[' TOK_INT ':' TOK_INT ']' { + if ($3 >= $1->size() || $3 < 0 || $3 < $5) + rtlil_frontend_ilang_yyerror("invalid slice"); $$ = new RTLIL::SigSpec($1->extract($5, $3 - $5 + 1)); delete $1; } | diff --git a/frontends/verilog/verilog_parser.y b/frontends/verilog/verilog_parser.y index daea3b43a..a30935e0a 100644 --- a/frontends/verilog/verilog_parser.y +++ b/frontends/verilog/verilog_parser.y @@ -2242,7 +2242,7 @@ gen_stmt: ast_stack.back()->children.push_back(node); ast_stack.push_back(node); } opt_arg_list ';'{ - ast_stack.pop_back(); + ast_stack.pop_back(); }; gen_stmt_block: @@ -2413,19 +2413,19 @@ basic_expr: append_attr($$, $2); } | basic_expr OP_SHL attr basic_expr { - $$ = new AstNode(AST_SHIFT_LEFT, $1, $4); + $$ = new AstNode(AST_SHIFT_LEFT, $1, new AstNode(AST_TO_UNSIGNED, $4)); append_attr($$, $3); } | basic_expr OP_SHR attr basic_expr { - $$ = new AstNode(AST_SHIFT_RIGHT, $1, $4); + $$ = new AstNode(AST_SHIFT_RIGHT, $1, new AstNode(AST_TO_UNSIGNED, $4)); append_attr($$, $3); } | basic_expr OP_SSHL attr basic_expr { - $$ = new AstNode(AST_SHIFT_SLEFT, $1, $4); + $$ = new AstNode(AST_SHIFT_SLEFT, $1, new AstNode(AST_TO_UNSIGNED, $4)); append_attr($$, $3); } | basic_expr OP_SSHR attr basic_expr { - $$ = new AstNode(AST_SHIFT_SRIGHT, $1, $4); + $$ = new AstNode(AST_SHIFT_SRIGHT, $1, new AstNode(AST_TO_UNSIGNED, $4)); append_attr($$, $3); } | basic_expr '<' attr basic_expr { |