1 files changed, 12 insertions, 0 deletions
diff --git a/techlibs/common/simlib.v b/techlibs/common/simlib.v
index b10c858f2..2c4db1ac6 100644
--- a/techlibs/common/simlib.v
+++ b/techlibs/common/simlib.v
@@ -1334,6 +1334,18 @@ endmodule
 
 // --------------------------------------------------------
 
+module \$anyseq (Y);
+
+parameter WIDTH = 0;
+
+output [WIDTH-1:0] Y;
+
+assign Y = 'bx;
+
+endmodule
+
+// --------------------------------------------------------
+
 module \$equiv (A, B, Y);
 
 input A, B;