diff options
Diffstat (limited to 'techlibs/common/techmap.v')
-rw-r--r-- | techlibs/common/techmap.v | 58 |
1 files changed, 7 insertions, 51 deletions
diff --git a/techlibs/common/techmap.v b/techlibs/common/techmap.v index b6c075b67..e0ecf0c48 100644 --- a/techlibs/common/techmap.v +++ b/techlibs/common/techmap.v @@ -54,12 +54,17 @@ module _90_simplemap_logic_ops; endmodule (* techmap_simplemap *) +(* techmap_celltype = "$eq $eqx $ne $nex" *) +module _90_simplemap_compare_ops; +endmodule + +(* techmap_simplemap *) (* techmap_celltype = "$pos $slice $concat $mux" *) module _90_simplemap_various; endmodule (* techmap_simplemap *) -(* techmap_celltype = "$sr $dff $adff $dffsr $dlatch" *) +(* techmap_celltype = "$sr $dff $dffe $adff $dffsr $dlatch" *) module _90_simplemap_registers; endmodule @@ -207,7 +212,7 @@ module _90_lcu (P, G, CI, CO); g[0] = g[0] | (p[0] & CI); // [[CITE]] Brent Kung Adder - // R. P. Brent and H. T. Kung, “A Regular Layout for Parallel Adders”, + // R. P. Brent and H. T. Kung, "A Regular Layout for Parallel Adders", // IEEE Transaction on Computers, Vol. C-31, No. 3, p. 260-264, March, 1982 // Main tree @@ -407,55 +412,6 @@ endmodule // -------------------------------------------------------- -// Equal and Not-Equal -// -------------------------------------------------------- - -(* techmap_celltype = "$eq $eqx" *) -module _90_eq_eqx (A, B, Y); - parameter A_SIGNED = 0; - parameter B_SIGNED = 0; - parameter A_WIDTH = 1; - parameter B_WIDTH = 1; - parameter Y_WIDTH = 1; - - localparam WIDTH = A_WIDTH > B_WIDTH ? A_WIDTH : B_WIDTH; - - input [A_WIDTH-1:0] A; - input [B_WIDTH-1:0] B; - output [Y_WIDTH-1:0] Y; - - wire carry, carry_sign; - wire [WIDTH-1:0] A_buf, B_buf; - \$pos #(.A_SIGNED(A_SIGNED), .A_WIDTH(A_WIDTH), .Y_WIDTH(WIDTH)) A_conv (.A(A), .Y(A_buf)); - \$pos #(.A_SIGNED(B_SIGNED), .A_WIDTH(B_WIDTH), .Y_WIDTH(WIDTH)) B_conv (.A(B), .Y(B_buf)); - - assign Y = ~|(A_buf ^ B_buf); -endmodule - -(* techmap_celltype = "$ne $nex" *) -module _90_ne_nex (A, B, Y); - parameter A_SIGNED = 0; - parameter B_SIGNED = 0; - parameter A_WIDTH = 1; - parameter B_WIDTH = 1; - parameter Y_WIDTH = 1; - - localparam WIDTH = A_WIDTH > B_WIDTH ? A_WIDTH : B_WIDTH; - - input [A_WIDTH-1:0] A; - input [B_WIDTH-1:0] B; - output [Y_WIDTH-1:0] Y; - - wire carry, carry_sign; - wire [WIDTH-1:0] A_buf, B_buf; - \$pos #(.A_SIGNED(A_SIGNED), .A_WIDTH(A_WIDTH), .Y_WIDTH(WIDTH)) A_conv (.A(A), .Y(A_buf)); - \$pos #(.A_SIGNED(B_SIGNED), .A_WIDTH(B_WIDTH), .Y_WIDTH(WIDTH)) B_conv (.A(B), .Y(B_buf)); - - assign Y = |(A_buf ^ B_buf); -endmodule - - -// -------------------------------------------------------- // Parallel Multiplexers // -------------------------------------------------------- |