diff options
Diffstat (limited to 'techlibs/coolrunner2')
| -rw-r--r-- | techlibs/coolrunner2/coolrunner2_fixup.cc | 4 | ||||
| -rw-r--r-- | techlibs/coolrunner2/coolrunner2_sop.cc | 4 | ||||
| -rw-r--r-- | techlibs/coolrunner2/synth_coolrunner2.cc | 8 |
3 files changed, 8 insertions, 8 deletions
diff --git a/techlibs/coolrunner2/coolrunner2_fixup.cc b/techlibs/coolrunner2/coolrunner2_fixup.cc index 8bbff9ba5..50710e2bd 100644 --- a/techlibs/coolrunner2/coolrunner2_fixup.cc +++ b/techlibs/coolrunner2/coolrunner2_fixup.cc @@ -112,7 +112,7 @@ RTLIL::Wire *makeptermbuffer(RTLIL::Module *module, SigBit inwire) struct Coolrunner2FixupPass : public Pass { Coolrunner2FixupPass() : Pass("coolrunner2_fixup", "insert necessary buffer cells for CoolRunner-II architecture") { } - void help() YS_OVERRIDE + void help() override { log("\n"); log(" coolrunner2_fixup [options] [selection]\n"); @@ -120,7 +120,7 @@ struct Coolrunner2FixupPass : public Pass { log("Insert necessary buffer cells for CoolRunner-II architecture.\n"); log("\n"); } - void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE + void execute(std::vector<std::string> args, RTLIL::Design *design) override { log_header(design, "Executing COOLRUNNER2_FIXUP pass (insert necessary buffer cells for CoolRunner-II architecture).\n"); extra_args(args, 1, design); diff --git a/techlibs/coolrunner2/coolrunner2_sop.cc b/techlibs/coolrunner2/coolrunner2_sop.cc index 045c73978..17e0d8432 100644 --- a/techlibs/coolrunner2/coolrunner2_sop.cc +++ b/techlibs/coolrunner2/coolrunner2_sop.cc @@ -25,7 +25,7 @@ PRIVATE_NAMESPACE_BEGIN struct Coolrunner2SopPass : public Pass { Coolrunner2SopPass() : Pass("coolrunner2_sop", "break $sop cells into ANDTERM/ORTERM cells") { } - void help() YS_OVERRIDE + void help() override { log("\n"); log(" coolrunner2_sop [options] [selection]\n"); @@ -33,7 +33,7 @@ struct Coolrunner2SopPass : public Pass { log("Break $sop cells into ANDTERM/ORTERM cells.\n"); log("\n"); } - void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE + void execute(std::vector<std::string> args, RTLIL::Design *design) override { log_header(design, "Executing COOLRUNNER2_SOP pass (break $sop cells into ANDTERM/ORTERM cells).\n"); extra_args(args, 1, design); diff --git a/techlibs/coolrunner2/synth_coolrunner2.cc b/techlibs/coolrunner2/synth_coolrunner2.cc index d5eeaf547..47102fbb1 100644 --- a/techlibs/coolrunner2/synth_coolrunner2.cc +++ b/techlibs/coolrunner2/synth_coolrunner2.cc @@ -29,7 +29,7 @@ struct SynthCoolrunner2Pass : public ScriptPass { SynthCoolrunner2Pass() : ScriptPass("synth_coolrunner2", "synthesis for Xilinx Coolrunner-II CPLDs") { } - void help() YS_OVERRIDE + void help() override { // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---| log("\n"); @@ -66,7 +66,7 @@ struct SynthCoolrunner2Pass : public ScriptPass string top_opt, json_file; bool flatten, retime; - void clear_flags() YS_OVERRIDE + void clear_flags() override { top_opt = "-auto-top"; json_file = ""; @@ -74,7 +74,7 @@ struct SynthCoolrunner2Pass : public ScriptPass retime = false; } - void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE + void execute(std::vector<std::string> args, RTLIL::Design *design) override { string run_from, run_to; clear_flags(); @@ -121,7 +121,7 @@ struct SynthCoolrunner2Pass : public ScriptPass log_pop(); } - void script() YS_OVERRIDE + void script() override { if (check_label("begin")) { |