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-rw-r--r--techlibs/ecp5/abc_5g.box5
-rw-r--r--techlibs/ecp5/cells_sim.v2
2 files changed, 4 insertions, 3 deletions
diff --git a/techlibs/ecp5/abc_5g.box b/techlibs/ecp5/abc_5g.box
index 15e26b5d5..5309aca87 100644
--- a/techlibs/ecp5/abc_5g.box
+++ b/techlibs/ecp5/abc_5g.box
@@ -4,8 +4,9 @@
# Box 1 : CCU2C (2xCARRY + 2xLUT4)
# Outputs: S0, S1, COUT
# (NB: carry chain input/output must be last
-# input/output and have been moved there
-# overriding the alphabetical ordering)
+# input/output and bus has been moved
+# there overriding the otherwise
+# alphabetical ordering)
# name ID w/b ins outs
CCU2C 1 1 9 3
diff --git a/techlibs/ecp5/cells_sim.v b/techlibs/ecp5/cells_sim.v
index 45515d582..08ae0a112 100644
--- a/techlibs/ecp5/cells_sim.v
+++ b/techlibs/ecp5/cells_sim.v
@@ -106,7 +106,7 @@ module PFUMX (input ALUT, BLUT, C0, output Z);
endmodule
// ---------------------------------------
-(* abc_box_id=2, abc_scc_break="DI" *)
+(* abc_box_id=2, abc_scc_break="DI,WRE" *)
module TRELLIS_DPR16X4 (
input [3:0] DI,
input [3:0] WAD,